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參數(shù)資料
| 型號(hào)： | TC1322EOART |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 10 us SETTLING TIME, 12-BIT DAC, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁(yè)數(shù)： | 4/11頁(yè) |
| 文件大?。?/td> | 65K |
| 代理商： | TC1322EOART |
2
TC1322-1
6/23/00
TC1322
12-Bit Digital-to-Analog Converter
with Two-Wire Interface
2001 Microchip Technology Inc.
DS21388A
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage (VDD) ................................................. +6V
DD + 0.3V)
Operating Temperature (TA) ............................ See Below
Storage Temperature (TSTG) ................. – 65°C to +150°C
Current On Any Pin ...............................................
±50 mA
Package Thermal Resistance (
θJA) .................... 330°C/W
*Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied.
Exposure to Absolute Maximum Rating Conditions for extended periods
may affect device reliability.
ELECTRICAL CHARACTERISTICS: VDD = 2.7V to 5.5V, – 40°C ≤ TA ≤ +85°C, unless otherwise noted.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
Power Supply
VDD
Supply Voltage
2.7
—
5.5
V
IDD
Operating Current
VDD = 5.5V, VREF = 1.2V
—
0.35
0.5
mA
Serial Port Inactive (Note 1)
IDD-STANDBY
Standby Supply Current
VDD =3.3V
—
0.1
1
A
Serial Port Inactive (Note 1)
STATIC PERFORMANCE–ANALOG SECTION: (VDD = 2.7V to 5.5V, VREF = 1.2V, –40°C ≤ TA ≤ 85°C,
unless otherwise noted.)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
Resolution
—
12
Bits
INL
Integral Non-Linearity at FS, TA = 25°C—
—
±16
LSB
FSE
Full Scale Error
—
±3
%FS
DNL
Differential Non-Linearity, TA = 25°C
All Codes (Note 2)
-1
—
+4
LSB
VOS
Offset Error at VOUT
(Note 2)
—
±0.3
±8mV
TCVOS
Offset Error Tempco at VOUT
—10
—
v/°C
PSRR
Power Supply Rejection Ratio
VDD at DC
—
80
—
dB
VREF
Voltage Reference Range
0
—
VDD – 1.2
V
IREF
Reference Input Leakage Current
—
±1.0
A
VSW
Voltage Swing
VREF ≤ (VDD – 1.2V)
0
—
VREF
V
ROUT
Output Resistance @ VOUT
ROUT (ohmic)
—
5
—
IOUT
Output Current (Source or Sink)
—
2
—
mA
ISC
Output Short-Circuit Current
Source
—
30
50
mA
VDD = 5.5V
Sink
—
20
50
mA
NOTES: 1. SDA and SCL must be connected to VDD or GND.
2. Measured at VOUT ≥ 50mV refered to GND to avoid output buffer clipping.
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