B0396-01
1 – a
rms
ABS
Ch1
Z
–1
a
Post-DAP Processing
32-BitLevel
I CRegisters
(PWMLevelMeter)
2
rms
ABS
Ch2
Z
–1
32-BitLevel
ADDR=0x6C
ADDR=0x6B
1 – a
a
2
Bit
–23
S_xx.xxxx_xxxx_xxxx_xxxx_xxxx_xxx
2
Bit
–5
2
Bit
–1
2 Bit
0
SignBit
2 Bit
1
M0125-01
(1or0)
2 +
1
(1or0)
2 +(1or0)
2
+.......(1or0)
2
+.......(1or0)
2
0
–1
–4
–23
2 Bit
1
2 Bit
0
2
Bit
–1
2
Bit
–4
2
Bit
–23
M0126-01
SLOS655A
– NOVEMBER 2010 – REVISED FEBRUARY 2011
PWM LEVEL METER
The structure in
Figure 42 shows the PWM level meter that can be used to study the power profile.
Figure 42. PWM Level Meter Structure
26-Bit 3.23 Number Format
All mixer gain coefficients are 26-bit coefficients using a 3.23 number format. Numbers formatted as 3.23
numbers means that there are 3 bits to the left of the binary point and 23 bits to the right of the binary point. This
Figure 43. 3.23 Format
The decimal value of a 3.23 format number can be found by following the weighting shown in
Figure 43. If the
most significant bit is logic 0, the number is a positive number, and the weighting shown yields the correct
number. If the most significant bit is a logic 1, then the number is a negative number. In this case every bit must
be inverted, a 1 added to the result, and then the weighting shown in
Figure 44 applied to obtain the magnitude
of the negative number.
Figure 44. Conversion Weighting Factors
—3.23 Format to Floating Point
2010–2011, Texas Instruments Incorporated
31