參數(shù)資料
型號(hào)： TAS3218PZPR
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： GREEN, PLASTIC, TQFP-100
文件頁(yè)數(shù)： 78/79頁(yè)
文件大?。?/td> 1263K
代理商： TAS3218PZPR
SAP OUT
(Transmitter )
LRCLKOUT
(Recreation /
Normalization )
DPLL
(11x)
DSP_CLK
(135 MHz)
DIVBY
4
MICRO _CLK
(33 MHz)
MCLKOUT
256 Fs
2816 Fs
64 Fs
Fs
SCLKOUT
64Fs
SCLKIN
LRCLKOUT
Fs
LRCLKIN
MCLKIN
128 Fs
MCLKIN
DIVBY
2
256 Fs
CMS (ClockMaster /SlaveSelection )
DIVBY
2
DIVBY
4
DIVBY
8
DIVBY
512
0
1
0
1
0
1
0
1
CMS
SAP IN
(Receiver )
SDIN 1
DatatoDSP Ch 1[23 :0 ]
ON (OutputNormalization
Enable )
SDOUT 1
DatafromDSP Ch 1 [23 :0]
SDIN 2
SDIN 3
DatatoDSP Ch 2[23 :0 ]
DatatoDSP Ch 3[23 :0 ]
DatatoDSP Ch 4[23 :0 ]
DatatoDSP Ch 5[23 :0 ]
DatatoDSP Ch 6[23 :0 ]
DatafromDSP Ch 2 [23 :0]
DatafromDSP Ch 3 [23 :0]
DatafromDSP Ch 4 [23 :0]
sdout 2
SPDIF_CLK
IM[1:0]
(SAP InputMode )
OM[1 :0]( SAP OutputMode )
SPDIF
Transmitter
ParallelDatafromDSP SPDIF _ L[23 :0]
ParallelDatafromDSP SPDIF _R[23 :0 ]
SPDIF _CONTROL _ REG_IN[]
spdif _tx_out
01
00
1*
SPDIF _IN
I2 CModule
DIVby 10
DIVby
(M+1)
DIVby 2^N
I2CSamplingClock
(N = 0)
SCL
SDA
I2CMasterSCL
Clock
(M = 8)
IM [1:0]
DigitalSignalProcessor
(DSP)
8051uC & Control
N[2:0]
M[2:0]
CMS
IW[1:0]
( SAP InputWordSize )
OW[1 :0]( SAP OutputWordSize )
OUTMUX [1 :0]
(AudioOutputSelect - ControlBits [1 :0]
fromSPDIFControlRegister : 0x16 )
SPDIF_OUT /
SDOUT2
0
1
SPDIF_MUTE
0
(MuteControlRegister : 0x09)
SAPOUT _MUTE [1 :0]
OSC
512Fs
Digital Audio Interface
SLES235 – JULY 2008 ....................................................................................................................................................................................................... www.ti.com
Figure 3. Clocking System
The TAS3218 has three digital inputs that accept discrete I2S, discrete left-justified, and discrete right-justified
PCM data.
The TAS3218 has two digital outputs that provide discrete I2S, discrete left-justified, and discrete right-justified
PCM data.The second digital output can also be configured to provide S/PDIF encoded PCM data.
The TAS3218 has a SPDIF input which is capable of routing an S/PDIF encoded signal through the device. This
input is not processed by the digital audio processor (DAP) The clocking system for the device is illustrated in
8
Copyright 2008, Texas Instruments Incorporated
Product Folder Link(s): TAS3218
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