- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98158 > TAS3004PFBRG4 (TEXAS INSTRUMENTS INC) SPECIALTY CONSUMER CIRCUIT, PQFP48 PDF資料下載
參數(shù)資料
| 型號： | TAS3004PFBRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | GREEN, PLASTIC, TQFP-48 |
| 文件頁數(shù)： | 36/84頁 |
| 文件大?。?/td> | 671K |
| 代理商： | TAS3004PFBRG4 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁當(dāng)前第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁
6–2
Table 6–1 lists the definitions used by the I2C protocol.
Table 6–1. I2C Protocol Definitions
DEFINITION
DESCRIPTION
Transmitter
The device that sends data
Receiver
The device that receives data
Master
The device that initiates a transfer, generates clock signals, and terminates the transfer
Slave
The device addressed by the master
Multimaster
More than one master can attempt to control the bus at the same time without corrupting the message.
Arbitration
Procedure to ensure the message is not corrupted when two masters attempt to control the bus.
Synchronization
Procedure to synchronize the clock signals of two or more devices
6.3
Operation
The 7-bit address for the TAS3004 device is 011010X R/W where X is a programmable address bit, set by terminal 7
(CS1). Combining CS1 and the R/W bit, the TAS3004 device can respond to four different I2C addresses (two read
and two write). These two addresses are licensed I2C addresses that do not conflict with other licensed I2C audio
devices. In addition to the 7-bit device address, subaddresses direct communication to the proper memory location
within the device. A complete table of subaddresses and control registers is provided in Appendix A. For example,
to change bass to 10-dB gain, Section 6.3.1 shows the data that is written to the I2C port:
Table 6–2. I2C Address Byte Table
I2C ADDRESS BYTE
A6–A1
CS1 (A0)
R/W
0x68
011010
0
0x69
011010
0
1
0x6A
011010
1
0
0x6B
011010
1
6.3.1
Write Cycle Example
Start
Slave Address
R/W
A
Subaddress
A
Data
A
Stop
FUNCTION
DESCRIPTION
Start
Start condition as defined in I2C
Slave address
0110100 (CS1 = 0)
R/W
0 (write)
A
Acknowledgement as defined in I2C (slave)
Subaddress
00000110 (see Appendix A)
Data
00011100 (see Appendix A)
Stop
Stop condition as defined in I2C
NOTE: Table is for serial data (SDA); serial clock (SCL) is not shown but conditions apply as well.
Whenever writing to a subaddress, the correct number of data bytes must follow in order to complete the write cycle.
For example, if the volume control register with subaddress 04 (hex) is written to, six bytes of data must follow;
otherwise, the cycle is incomplete and errors occur.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TAS3103DBT | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| TAS3103IDBT | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| TAS3103DBTRG4 | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| TAS3103DBTR | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| TAS3103IDBTRG4 | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TAS3103 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Audio Processor With 3D Effects |
| TAS3103A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Audio Processor With 3D Effects |
| TAS3103ADBT | 功能描述:音頻 DSP Digital Audio Processor w/ 3D Eff RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3103ADBTG4 | 功能描述:音頻 DSP Digital Audio Processor w/ 3D Eff RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3103ADBTR | 功能描述:音頻 DSP Digital Audio Processor w/ 3D Eff RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。