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參數(shù)資料
| 型號： | TAS3002 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | QFP-48 |
| 文件頁數(shù)： | 24/54頁 |
| 文件大?。?/td> | 266K |
| 代理商： | TAS3002 |
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62
Table 61 lists the definitions used by the I2C protocol.
Table 61. I2C Protocol Definitions
DEFINITION
DESCRIPTION
Transmitter
The device that sends data
Receiver
The device that receives data
Master
The device that initiates a transfer, generates clock signals, and terminates the transfer
Slave
The device addressed by the master
Multimaster
More than one master can attempt to control the bus at the same time without corrupting the message.
Arbitration
Procedure to ensure the message is not corrupted when two masters attempt to control the bus.
Synchronization
Procedure to synchronize the clock signals of two or more devices
6.3
Operation
The 7-bit address for the TAS3002 device is 0110 10X R/W where X is a programmable address bit, set by terminal 7
(CS1). Combining CS1 and the R/W bit, the TAS3002 device can respond to four different I2C addresses (two read
and two write). These two addresses are licensed I2C addresses that do not conflict with other licensed I2C audio
devices. In addition to the 7-bit device address, subaddresses direct communication to the proper memory location
within the device. A complete table of subaddresses and control registers is provided in Appendix A. For example,
to change bass to 10-dB gain, Section 6.3.1 shows the data that is written to the I2C port:
Table 62. I2C Address Byte Table
I2C ADDRESS BYTE
A6 A1
CS1 (A0)
R/W
68h
011010
0
69h
011010
0
1
6Ah
011010
1
0
6Bh
011010
1
6.3.1
Write Cycle Example
Start
Slave Address
R/W
A
Subaddress
A
Data
A
Stop
FUNCTION
DESCRIPTION
Start
Start condition as defined in I2C
Slave address
0110100 (CS1 = 0)
R/W
0 (write)
A
Acknowledgement as defined in I2C (slave)
Subaddress (treble control register)
0000 0101
Data (0 dB gain)
0111 0010
Stop
Stop condition as defined in I2C
NOTE: Table is for serial data (SDA); serial clock (SCL) is not shown but conditions apply as well.
Whenever writing to a subaddress, the correct number of data bytes must follow in order to complete the write cycle.
For example, if the volume control register with subaddress 04h is written to, six bytes of data must follow; otherwise,
the cycle is incomplete and errors occur.
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| TAS3002PFB | 功能描述:音頻 DSP Digital Audio Processor w/ Codec RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3002PFBG4 | 功能描述:音頻 DSP Digital Audio Processor w/ Codec RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3002PFBR | 功能描述:音頻 DSP Digital Audio Processor w/ Codec RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3002PFBRG4 | 功能描述:音頻 DSP Digital Audio Processor w/ Codec RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3004 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Audio Processor With Codec |
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