參數(shù)資料
型號: T89C51RC2-SLBCL
廠商: Atmel Corp.
英文描述: 8-bit Microcontroller with 16 Kbytes/ 32 Kbytes FLASH
中文描述: 8位微控制器,帶有16字節(jié)/ 32千字節(jié)閃存
文件頁數(shù): 20/170頁
文件大?。?/td> 1927K
代理商: T89C51RC2-SLBCL
20
A/T89C51CC01
4129L–CAN–08/05
Register
Table 13.
CKCON Register
CKCON (S:8Fh)
Clock Control Register
Note:
1. This control bit is validated when the CPU clock bit X2 is set; when X2 is low, this bit
has no effect.
Reset Value = 0000 0000b
7
6
5
4
3
2
1
0
CANX2
WDX2
PCAX2
SIX2
T2X2
T1X2
T0X2
X2
Bit
Number
Bit
Mnemonic
Description
7
CANX2
CAN clock
(1)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
6
WDX2
Watchdog clock
(1)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
5
PCAX2
Programmable Counter Array clock
(1)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
4
SIX2
Enhanced UART clock (MODE 0 and 2)
(1)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
3
T2X2
Timer 2 clock
(1)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
2
T1X2
Timer 1 clock
(1)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
1
T0X2
Timer 0 clock
(1)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
0
X2
CPU clock
Clear to select 12 clock periods per machine cycle (STD mode) for CPU and all
the peripherals.
Set to select 6 clock periods per machine cycle (X2 mode) and to enable the
individual peripherals "X2"bits.
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