
300
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
Note:
1. The SPIEN Fuse is not accessible in serial programming mode.
4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of Lock bits
and JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the clock system to
be running in all sleep modes. This may increase the power consumption.
Note:
1. The default value of SUT1..0 results in maximum start-up time for the default clock source.
2. The default setting of CKSEL3..0 results in internal RC Oscillator @ 8MHz. See
Table 9-1 onThe status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
Table 27-4.
Fuse High byte.
Fuse High byte
Bit no.
Description
Default value
7Enable OCD
1 (unprogrammed, OCD
disabled)
JTAGEN
6
Enable JTAG
0 (programmed, JTAG enabled)
5
Enable Serial Program and Data
Downloading
0 (programmed, SPI prog.
enabled)
4
Watchdog Timer always on
1 (unprogrammed)
EESAVE
3
EEPROM memory is preserved
through the Chip Erase
1 (unprogrammed, EEPROM
not preserved)
BOOTSZ1
2
BOOTSZ0
1
BOOTRST
0
Select Reset Vector
1 (unprogrammed)
Table 27-5.
Fuse Low byte.
Fuse Low byte
Bit no.
Description
Default value
7
Divide clock by 8
0 (programmed)
6
Clock output
1 (unprogrammed)
SUT1
5
Select start-up time
SUT0
4
Select start-up time
CKSEL3
3
Select Clock source
CKSEL2
2
Select Clock source
CKSEL1
1
Select Clock source
CKSEL0
0
Select Clock source