- 您現(xiàn)在的位置：買賣IC網 > PDF目錄361344 > T436416C-7SG (TM Technology, Inc.) 4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM PDF資料下載
參數(shù)資料
| 型號： | T436416C-7SG |
| 廠商： | TM Technology, Inc. |
| 英文描述： | 4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM |
| 中文描述： | 4米× 16 SDRAM的100萬x 16Bit的X 4Banks同步DRAM |
| 文件頁數(shù)： | 7/28頁 |
| 文件大?。?/td> | 651K |
| 代理商： | T436416C-7SG |
第1頁第2頁第3頁第4頁第5頁第6頁當前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
TE
CH
tm
OPERATING AC PARAMETER
(AC opterating conditions unless otherwise noted)
T436416C
TM Technology Inc. reserves the right
P. 7
to change products or specifications without notice.
Publication Date: AUG. 2004
Revision: A
Speed Version
-6
12
Parameter
Symbol
-7
14
Unit
Note
Row active to row active delay
t
RRD
(min)
t
RCD
(min)
t
RP
(min)
t
RAS
(min)
t
RAS
(max)
t
RC
(min)
t
RFC
(min)
ns
1
RAS to CAS delay
18
20
ns
1
Row precharge time
18
20
ns
1
40
42
ns
ns
ns
ns
CLK
1
1
1,5
2
Row active time
100K
Row cycle time (operating)
Row cycle time (auto refresh)
Last data in to new col. Address delay
t
CDL
(min)
Last data in to row precharge
58
60
63
70
1
t
RDL
(min)
t
BDL
(min)
t
CCD
(min)
CAS latency=3
CAS latency=2
2
CLK
2
Last data in to burst stop
1
CLK
2
Col. Address to col. Address delay
1
2
1
CLK
3
Number of valid output data
ea
4
Note:
1. The minimum number of clock cycles is determined by dividing the minimum time required
with clock cycle time and then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
5. A new command may be given
t
RFC
after self refresh exit.
相關PDF資料 |
PDF描述 |
|---|---|
| T436416D | 4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM |
| T436416D-5C | 4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM |
| T436416D-5CG | 4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM |
| T436416D-5S | 4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM |
| T436416D-5SG | 4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| T436416D | 制造商:TMT 制造商全稱:TMT 功能描述:4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM |
| T436416D-5C | 制造商:TMT 制造商全稱:TMT 功能描述:4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM |
| T436416D-5CG | 制造商:TMT 制造商全稱:TMT 功能描述:4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM |
| T436416D-5S | 制造商:TMT 制造商全稱:TMT 功能描述:4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM |
| T436416D-5SG | 制造商:TMT 制造商全稱:TMT 功能描述:4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復。