參數(shù)資料
型號: T15N1024A-70HI
廠商: TM Technology, Inc.
英文描述: 128K X 8 LOW POWER CMOS STATIC RAM
中文描述: 128K的× 8低功耗CMOS靜態(tài)RAM
文件頁數(shù): 1/13頁
文件大?。?/td> 91K
代理商: T15N1024A-70HI
TE
CH
tm
SRAM
FEATURES
Low-power consumption
- Active: 40mA at 55ns (Max.)
- CMOS Stand-by: 10uA (Max.)
55/70/100 ns access time
Equal access and cycle time
Single +2.4V to 3.6V Power Supply
TTL compatible , Tri-state output
Common I/O capability
Automatic power-down when deselected
Available in 32-pin SOP ,TSOP-I(8x20mm),
TSOP-I(8x13.4mm) ,48-pin CSP packages
T15N1024A
TM Technology Inc. reserves the right
P. 1
to change products or specifications without notice.
Publication Date: FEB. 2003
Revision:E
128K X 8 LOW POWER
CMOS STATIC RAM
Operating temperature :
Commercial : 0 ~ +70
°
C
Industrial : -40 ~ +85
°
C
PART NUMBER EXAMPLES
PART NO.
PACKAGE
CODE
Operating
Temperature
T15N1024A-55D
T15N1024A-70H
T15N1024A-100P
T15N1024A-100C
D=SOP
H=TSOP-I(8x20)
P=TSOP-I(8x13.4)
C=CSP
0 ~ +70
°
C
T15N1024A-55DI
T15N1024A-70HI
T15N1024A-100PI
T15N1024A-100CI
D=SOP
H=TSOP-I(8x20)
P=TSOP-I(8x13.4)
C=CSP
-40 ~ +85
°
C
GENERAL DESCRIPTION
The T15N1024A is a very Low Power CMOS
Static RAM organized as 131,072 words by 8 bits.
That operates on a wide voltage range from 2.4V
to 3.6V power supply, Fabricated using high
performance CMOS technology, Inputs and
three-state outputs are TTL compatible and allow
for direct interfacing with common system bus
structures. Data retention is guaranteed at a power
supply voltage as low as 1.5V.
BLOCK DIAGRAM
Vcc
Vss
DECODER
A0
.
.
.
A16
I/O8
.
DATA I/O
CORE
ARRAY
I/O1
WE
OE
CE1
CE2
CONTROL
CIRCUIT
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