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參數(shù)資料
| 型號： | SYS32256LKI-020 |
| 元件分類： | SRAM |
| 英文描述： | 256K X 32 MULTI DEVICE SRAM MODULE, 20 ns, SMA64 |
| 封裝： | PLASTIC, SIMM-64 |
| 文件頁數(shù)： | 3/7頁 |
| 文件大?。?/td> | 114K |
| 代理商： | SYS32256LKI-020 |
SYS32256ZK/LK - 020/25/30/35
ISSUE 1.7 January 1999
3
Low V
cc Data Retention Characteristics - L Version Only (TOP = 0°C to 70°C)
-L Part
Parameter
Symbol
Test Condition
min
typ(1)
max
Unit
V
CC for Data Retention
V
DR
CS - V
CC-0.2V
2.0
-
V
0.2V
≥ V
in ≥ Vcc-0.2
Data Retention Current
I
CCDR
V
CC = 3.0V, CS = VCC-0.2V
-
16
400
A
0.2V
≥ V
in ≥ Vcc-0.2
Chip Deselect to
Data Retention Time
t
CDR
See Retention Waveform
0-
-
ns
Operation Recovery Time
t
R
See Retention Waveform
5-
-
ms
Notes (1) Typical figures are measured at 25°C.
Parameter
Symbol
Test Condition
typ
max
Unit
Input Capacitance (CS)
C
IN1
V
IN = 0V
-
12
pF
Input Capacitance (other)
C
IN2
V
IN = 0V
-
48
pF
I/O Capacitance
C
I/O
V
I/O = 0V
-
8
pF
Capacitance (V
CC=5V±10%,TA=25
oC)
Note: Capacitance calculated, not measured.
AC Test Conditions
Output Load
* Input pulse levels: Vss to 3.0V
* Input rise and fall times: 5ns
* Input and Output timing reference levels: 1.5V
* Output load: see diagram
* V
CC = 5V± 10%
CSn
OE
WE
DATA PINS
SUPPLY CURRENT
MODE
H
X
High Impedance
ISB1 , ISB2
Standby
L
H
Data Out
ICC1 , ICC2
Read
L
X
L
Data In
ICC1 , ICC2
Write (1)
L
Data In
ICC1 , ICC2
Write (2)
Notes : H = VIH : L =VIL : X = VIH or VIL
Operation Truth Table
166
30pF
I/O Pin
1.76V
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