參數(shù)資料
型號: SY89838UMG
廠商: Micrel Inc
文件頁數(shù): 6/9頁
文件大?。?/td> 0K
描述: IC CLK BUFF MUX 2:8 2GHZ 32-MLF
標準包裝: 60
系列: Precision Edge®
類型: 扇出緩沖器(分配),多路復用器
電路數(shù): 1
比率 - 輸入:輸出: 2:8
差分 - 輸入:輸出: 是/是
輸入: CML,LVDS,LVPECL
輸出: LVDS
頻率 - 最大: 2GHz
電源電壓: 2.375 V ~ 2.625 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,32-MLF?
供應商設備封裝: 32-MLF?(5x5)
包裝: 管件
產(chǎn)品目錄頁面: 1084 (CN2011-ZH PDF)
其它名稱: 576-1538-5
SY89838UMG-ND
Micrel, Inc.
SY88289AL
February 2007
6
M9999-021207-B
hbwhelp@micrel.com or (408) 955-1690
Functional Block Diagram
Detailed Description
The SY88289AL low-power limiting post amplifier
operates from a single +3.3V power supply, over
temperatures from –40
oC to +85oC. Signals with data
rates of up to 3.2Gbps and as small as 10mVPP can
be amplified. Figure 1 shows the allowed input voltage
swing. The SY88289AL generates a LOS output.
LOSLVL sets the sensitivity of the input amplitude
detection.
Input Amplifier/Buffer
Figure
2
shows
a
simplified
schematic
of
the
SY88289AL’s input stage. The high-sensitivity of the
input amplifier allows signals as small as 10mVPP to
be detected and amplified. The input amplifier also
allows input signals as large as 1800mVPP. Input
signals are linearly amplified with a typical 38dB
differential voltage gain. Since it is a limiting amplifier,
the SY88289AL outputs typically 800mVPP voltage-
limited waveforms for input signals that are greater
than 12mVPP. Applications requiring the SY88289AL
to operate with high gain should have the upstream
TIA placed as close as possible to the SY88289AL’s
input pins to ensure the best performance of the
device.
Output Buffer
The SY88289AL’s CML output buffer is designed to
drive 50
lines. The output buffer requires appropriate
termination for proper operation. An external 50
resistor to VCC for each output pin provides this. Figure
3 shows a simplified schematic of the output stage.
Loss-of-signal
The SY88289AL generates a chatter-free LOS open-
collector TTL output with an internal 4.75k
pull
-up
resistor as shown in Figure 4. LOS is used to
determine that the input amplitude is large enough to
be considered a valid input. LOS asserts high if the
input amplitude falls below the threshold sets by
LOSLVL and de-asserts low otherwise. LOS can be fed
back to the enable bar (/EN) input to maintain output
stability under a loss of signal condition. /EN de-
asserts the true output signal without removing the
input signals. Typically, 3.5dB LOS hysteresis is
provided to prevent chattering.
Loss-of-signal Level Set
A programmable LOS level-set (LOSLVL) pin sets the
threshold of the input amplitude detection. Connecting
an external resistor between VCC and LOSLVL sets the
voltage at LOSLVL. This voltage ranges from VREF to
VCC. The external resistor creates a voltage divider
between VCC and VREF as shown in Figure 5.
Hysteresis
The
SY88289AL
provides
typically
3.5dB
LOS
electrical hysteresis. By definition, a power ratio
measured in dB is 10log (power ratio). Power is
calculated as V
2
IN/R for an electrical signal. Hence,
the same ratio can be stated as 20log (voltage ratio).
While in linear mode, the electrical voltage input
changes linearly with the optical power and therefore,
the ratios change linearly. Thus, the optical hysteresis
in dB is half the electrical hysteresis in dB given in the
data sheet. Since the SY88289AL is an electrical
device, this data sheet refers to hysteresis in electrical
terms. With 3.5dB LOS hysteresis, a voltage factor of
1.5 is required to assert or de-assert LOS.
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