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參數(shù)資料
| 型號(hào)： | SY87700ALHG TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK/DATA RECOVERY 32-TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | AnyRate® |
| 類型： | 時(shí)鐘和數(shù)據(jù)恢復(fù)（CDR），多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | 以太網(wǎng)，SONET/SDH，ATM 應(yīng)用 |
| 輸入： | PECL |
| 輸出： | PECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:3 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 208Mbps |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-EPAD-TQFP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY87700ALHGTR SY87700ALHGTR-ND |
2011 Microchip Technology Inc.
DS25010C-page 13
MCP7940N
The 12/24-hour bits 0xCh.6 and 0x13h.6 are cop-
ies of the bit in 0x02h.6. The bits are read-only.
0x18h-0x1Bh are used for the timesaver function.
These registers are loaded at the time when VCC fails
and the RTCC operates on the VBAT. The VBAT bit is
also set at this time. These registers are cleared when
the VBAT bit is cleared in software.
0x1Ch-0x1Fh are used for the timesaver function.
These registers are loaded at the time when VCC is
restored and the RTCC switches to VDD. These
registers are cleared when the VBAT bit is cleared in
software.
5.2
FEATURES
5.2.1
CALIBRATION
The MCP7940N utilizes digital calibration to correct for
inaccuracies of the input clock source (either external
or crystal). Calibration is enabled by setting the value
of the Calibration register at address 08H. Calibration
is achieved by adding or subtracting a number of input
clock cycles per minute in order to achieve ppm level
adjustments in the internal timing function of the
MCP7940N.
The MSB of the Calibration register is the sign bit, with
a ‘1’ indicating subtraction and a ‘0’ indicating addition.
The remaining seven bits in the register indicate the
number of input clock cycles (multiplied by two) that
are subtracted or added per minute to the internal
timing function.
The internal timing function can be monitored using
the MFP open-drain output pin by setting bit [6]
(SQWE) and bits [2:0] (RS2, RS1, RS0) of the control
register at address 07H. Note that the MFP output
waveform is disabled when the MCP7940N is running
in VBAT mode. With the SQWE bit set to ‘1’, there are
two methods that can be used to observe the internal
timing function of the MCP7940N:
A. RS2 BIT SET TO ‘0’
With the RS2 bit set to ‘0’, the RS1 and RS0 bits
enable the following internal timing signals to be
output on the MFP pin:
The frequencies listed in the table presume an input
clock source of exactly 32.768 kHz. In terms of the
equivalent number of input clock cycles, the table
becomes:
With regards to the calibration function, the Calibration
register setting has no impact upon the MFP output
clock signal when bits RS1 and RS0 are set to ‘11’.
The setting of the Calibration register to a non-zero
value (i.e., values other than 00H or 80H) enables the
calibration function which can be observed on the
MFP output pin. The calibration function can be
expressed in terms of the number of input clock cycles
added/subtracted from the internal timing function.
000 – Seconds match
001 – Minutes match
010 – Hours match (takes into account 12/24
hour)
011 – Matches the current day, interrupt at
12.00.00 a.m. Example: 12 midnight on
100
–Date
101
– RESERVED
110
– RESERVED
111
– Seconds, Minutes, Hour, Day, Date,
Month
Note:
It is strongly recommended that the
timesaver function only be used when the
oscillator is running. This will ensure
accurate functionality.
RS2
RS1
RS0
Output Signal
00
0
1 Hz
00
1
4.096 kHz
01
0
8.192 kHz
01
1
32.768 kHz
RS2
RS1
RS0
Output Signal
00
0
32768
00
1
8
01
0
4
01
1
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