參數(shù)資料
型號: SY55856UHI TR
廠商: Micrel Inc
文件頁數(shù): 1/9頁
文件大?。?/td> 0K
描述: IC DELAY LINE 7TAP 32-TQFP
標(biāo)準(zhǔn)包裝: 1,000
系列: SuperLite&trade
標(biāo)片/步級數(shù): 7
功能: 多個(gè),不可編程
延遲到第一抽頭: 50ps
接頭增量: 50ps
可用的總延遲: 350ps
獨(dú)立延遲數(shù): 2
電源電壓: 2.3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-EPAD-TQFP
包裝: 帶卷 (TR)
其它名稱: SY55856UHITR
SY55856UHITR-ND
1
SuperLite
SY55856U
Micrel, Inc.
M9999-021908
hbwhelp@micrel.com or (408) 955-1690
DESCRIPTION
■ Guaranteed AC parameters over temp and voltage
> 2.5GHz f
MAX
< 384ps prop delay
< 120ps t
r/tf
■ Delay either clock or data
■ 50ps increments
± 350ps total delay
■ Source terminated CML outputs
■ Full differential I/O
■ Wide supply voltage spectrum: 2.3V to 3.6V
■ Available in a tiny 32-pin EPAD-TQFP package
FEATURES
2.5V/3.3V 2.5GHz
DIFFERENTIAL 2-CHANNEL
PRECISION CML DELAY LINE
SuperLite
SY55856U
APPLICATIONS
■ Data communications systems
■ Telecom systems
■ High-speed backplanes
■ Signal de-skewing
■ Pulse alignment
■ Digitally controlled delay lines
Rev.: F
Amendment: /0
Issue Date:
February 2008
The SY55856U is a 2.5GHz, two-channel, fully differential
CML (Current Mode Logic) delay line. The device is
optimized to adjust the relative delay between two channels,
such as clock and data, in 50ps increments. Both inputs
may be adjusted in either direction in 7 increments of 50ps,
for a total adjustment range of ±350ps. In addition, the
clock input maybe inverted through the CINV control pin.
The SY55856U inputs are designed to accept single-
ended or differential CML signals. The differential CML
outputs are optimized for 50 loads (50 source terminated),
thus only requires a single 100 resistor across the output
pair. Output rise and fall time is an extremely fast 110ps(max)
and the differential swing is 400mV. The maximum
throughput of the SY55856U is guaranteed to exceed
2.5GHz (5Gbps).
SuperLite is a trademarks of Micrel, Inc.
SuperLite
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