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參數(shù)資料
| 型號： | STR751FR0 |
| 廠商： | 意法半導體 |
| 元件分類： | ADC |
| 英文描述： | Zener Diode; Application: General; Pd (mW): 400; Vz (V): 29.02 to 30.51; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: MHD |
| 中文描述： | 的ARM7TDMI - S⑩32位微控制器的閃存，新措施，3性病16位定時器，PWM定時器，快速的10位ADC和I2C，UART的，過磷酸鈣，USB和CAN |
| 文件頁數(shù)： | 54/84頁 |
| 文件大?。?/td> | 997K |
| 代理商： | STR751FR0 |
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Electrical parameters
STR750Fxx STR751Fxx STR752Fxx STR755Fxx
58/84
NRSTIN and NRSTOUT pins
NRSTIN Pin Input Driver is TTL/LVTTL as for all GP I/Os. A permanent pull-up is present
which is the same as RPU (see : General characteristics on page 54)
NRSTOUT Pin Output Driver is equivalent to the O2 type driver except that it works only as
an open-drain (the P-MOS is de-activated). A permanent pull-up is present which is the
same as RPU (see : General characteristics on page 54)
Subject to general operating conditions for VDD_IO and TA unless otherwise specified.
Table 35.
NRSTIN and NRSTOUT pins
Symbol
Parameter
Conditions
Min
Typ 1)
Max
Unit
VIL(NRSTIN)
NRSTIN Input low level
voltage(1)
1.
Data based on product characterisation, not tested in production.
0.8
V
VIH(NRSTIN)
NRSTIN Input high level
voltage(1)
2
Vhys(NRSTIN)
NRSTIN Schmitt trigger
voltage hysteresis(2)
2.
Hysteresis voltage between Schmitt trigger switching levels.
400
mV
VOL(NRSTIN)
NRSTOUT Output low level
voltage(3)
3.
The IIO current sunk must always respect the absolute maximum rating specified in Section 5.2.2 and the
sum of IIO (I/O ports and control pins) must not exceed IVSS.
IIO=+2 mA
0.4
V
RPU(NRSTIN)
NRSTIN Weak pull-up
equivalent resistor(4)
4.
The RPU pull-up equivalent resistor are based on a resistive transistor
VIN=VSS
VDD_IO=3.3 V 25
50
100
k
VDD_IO=5 V
20
31
100
k
tw(RSTL)out
Generated reset pulse
duration (visible at NRSTOUT
pin)(5)
5.
To guarantee the reset of the device, a minimum pulse of 15 s has to be applied to the internal reset. At
VDD_IO power-up, the built-in reset stretcher may not generate the 15 s pulse duration while once VDD_IO
is established, an external reset pulse will be internally stretched up to 15 s thanks to the reset pulse
stretcher.
Internal reset source
15
20
s
th(RSTL)in
External reset pulse hold time
at NRSTIN pin(6)
6.
The reset network (the resistor and two capacitors) protects the device against parasitic resets, especially
in noisy environments.
At VDD_IO power-up
(5)
20
s
When VDD_IO is
established(5)
1
s
tg(RSTL)in
maximum negative spike
duration filtered at NRSTIN
pin(7)
7.
In fact the filter is made to ignore all incoming pulses with short duration:
- all negative spikes with a duration less than 150 ns are filtered
- all trains of negative spikes with a ratio of 1/2 are filtered. This means that all spikes with a maximum
duration of 150 ns with minimum interval between spikes of 75 ns are filtered.
Data guaranteed by design, not tested in production.
The time between two
spikes must be higher
than 1/2 of the spike
duration.
150
ns
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| STR751FR0H6 | 功能描述:ARM微控制器 - MCU 16/32-BITS MICROS RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| STR751FR0T6 | 功能描述:ARM微控制器 - MCU 32-BITS MICROS RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| STR751FR0T6/MIN | 制造商:STMicroelectronics 功能描述: |
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| STR751FR1H6 | 功能描述:ARM微控制器 - MCU 16/32-BITS MICROS RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
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