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參數(shù)資料
| 型號： | STR73XF_0609 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | ARM7TDMI 32-bit MCU with Flash, 3x CAN, 4 UARTs, 20 timers, ADC, 12 comm. interfaces |
| 中文描述： | ARM7TDMI的32位微控制器的閃存，3倍的CAN，4個UART，20定時器，ADC和12通信設(shè)備。接口 |
| 文件頁數(shù)： | 33/53頁 |
| 文件大?。?/td> | 764K |
| 代理商： | STR73XF_0609 |
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STR73xF
Electrical parameters
33/53
RC/Backup Oscillator characteristics
V
DD
= 5V ±
10%
,
T
A
= -40°C to T
Amax
, unless otherwise specified.
Table 14. RC Oscillator Characteristics
1) CMU_RCCTL = 0x8
2) RC frequency shift versus average value (%)
PLL Electrical Characteristics
V
DD
= 5V ±
10%
,
T
A
= -40°C to T
Amax
, unless otherwise specified
Table 15.
PLL characteristics.
Symbol
Parameter
Conditions
Value
Typ
2.35
29
Unit
Min
Max
f
RC
RC Frequency
High Frequency mode
1)
Low Frequency mode
1)
CMU_RCCTL = 0x0
CMU_RCCTL = 0xF
CMU_RCCTL = 0x0
CMU_RCCTL = 0xF
Fixed CMU_RCCTL
Fixed CMU_RCCTL
Stable V
DD
, f
o
= 2.35
MHz, T
A
= 25
C
MHz
kHz
MHz
MHz
kHz
kHz
%
%
f
RCHF
RC High Frequency
3
2.3
f
RCLF
RC Low Frequency
35
30
10
23
f
RCHFS2)
f
RCLFS2)
RC High Frequency stability
RC Low Frequency stability
t
RCSTUP
RC Start-up Time
2.35
μs
Symbol
Parameter
Conditions
Value
Unit
Min
Typ
Max
f
PLLIN(1)
1.
f
PLLIN
is obtained from f
OSC
directly or through an optional divider by 2.
Typical data are based on T
A
=25°C, V
DD
=5V
Max value is guaranteed by characterization, not tested in production.
2.
3.
PLL reference clock
FREF_RANGE = ‘0’
FREF_RANGE = ‘1’
1.5
3.0
3.0
5.0
MHz
f
PLLOUT
PLL output clock
MX = ”00”
MX = ”01”
MX = ”10”
MX = ”11”
20 x f
PLLIN
12 x f
PLLIN
28 x f
PLLIN
16 x f
PLLIN
MHz
f
MCLK
System clock
DX = 1..7
f
PLLOUT
/DX
36
MHz
f
FREE
(2)
PLL free running
frequency
FREF_RANGE = ‘0’, MX0 = ’1’
FREF_RANGE = ‘0’, MX0 = ’0’
FREF_RANGE = ‘1’, MX0 = ’1’
FREF_RANGE = ‘1’, MX0 = ’0’
120
240
240
480
kHz
t
LOCK(3)
PLL lock time
stable oscillator
(f
PLLIN
= 4 MHz), stable V
DD
100
300
μ
s
t
PKJIT
PLL jitter (pk to pk)
f
PLLIN
= 4 MHz (pulse
generator)
1.5
ns
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