參數(shù)資料
型號: STR710RZT6
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 0.50 MM PITCH, LQFP-144
文件頁數(shù): 4/77頁
文件大小: 1919K
代理商: STR710RZT6
System architecture
STR71xF
12/77
Legend / abbreviations for Table 3:
Type:
I = input, O = output, S = supply, HiZ= high impedance,
In/Output level: C = CMOS 0.3VDD/0.7VDD
CT= CMOS 0.3VDD/0.7VDD with input trigger
TT= TTL 0.8V/2V with input trigger
C/T = Programmable levels: CMOS 0.3VDD/0.7VDD or TTL 0.8V / 2V
Port and control configuration:
Input:
pu/pd= software enabled internal pull-up or pull down
pu= in reset state, the internal 100k
weak pull-up is enabled.
pd = in reset state, the internal 100k
weak pull-down is enabled.
Output:
OD = open drain (logic level)
PP = push-pull
T = true OD, (P-Buffer and protection diode to VDD not implemented),
5V tolerant.
Table 2.
STR710 BGA ball connections
ABC
D
E
F
G
H
J
K
L
M
1
P0.10
P2.0
P2.1
VSS
P2.2
P2.6
BOOT
EN
P2.12
P2.13
P2.15
JTDI
N.C.
2
VSS
RDn
P0.11
V33
P2.3
P2.8
P2.9
JTMS
JTRST
n
TEST
N.C.
3
V33
P0.9
P0.12
P0.13
P2.4
N.C.
P2.10
JTCK
NU
V33
N.C.
DBG
RQS
4
P0.6
P0.7
P0.8
P0.14
P2.5
N.C.
P2.11
JTDO
CK
CKOUT
VSSIO-
PLL
N.C.
5
A.19
WEn.1
WEn.0
P0.5
P2.7
VSS
P2.14
N.C.
RTCX-
TO
RTCXTI
N.C.
P0.15
6
P0.3
A.15
A.16
A.17
A.18
V33
V18
N.C.
V18BK
P
VSS
BKP
STDBY
7
P0.2
P0.1
P0.4
VSS18
V18
A.14
D.12
D.1
D.0
nc
VSS18
RSTIN
8
A.9
A.10
A.11
A.13
P0.0
A.0
D.11
P1.12/
CANTX
N.C.
AVSS
D.3
D.2
9
VSS
V33
A.5
A.6
V33
D.15
D.10
P1.8
D.9
P1.0
N.C.
10
A.8
N.C.
P1.15
P1.13
VSS
D.14
USBDN
P1.7
D.8
P1.5
P1.1
D.4
11
A.7
N.C.
P1.14
P1.10
A.2
D.13
USBDP
VSS
D.5
P1.4
P1.3
AVDD
12
A.12
A.4
A.3
P1.9
A.1
P1.11/
CANRX
N.C.
V33IO-
PLL
P1.6
D.7
D.6
P1.2
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