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| 型號(hào)： | STPCE1DDBI |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數(shù)： | 67/87頁 |
| 文件大小： | 1356K |
| 代理商： | STPCE1DDBI |
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DESIGN GUIDELINES
Release 1.3 - January 29, 2002
67/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
6.3.6. IPC
Most of the IPC signals are multiplexed: Interrupt
inputs, DMA Request inputs, DMA Acknowledge
outputs. The figure below describes a complete
implementation of the IRQ[15:0] time-multiplexing.
When an interrupt line is used internally, the
corresponding input can be grounded. In most of
the embedded designs, only few interrupts lines
are necessary and the glue logic can be simplified.
When the interface is integrated into the STPC,
the corresponding interrupt line can be grounded
as it is connected internally.
For example, if the integrated IDE controller is
activated, the IRQ[14] and IRQ[15] inputs can be
grounded.
Figure 6-10. Typical IRQ multiplexing
74x153
1C0
1C1
1C2
1C3
2C0
2C1
2C2
2C3
A
B
1Y
1G
IRQ[0]
IRQ[1]
IRQ[2]
IRQ[3]
IRQ[4]
IRQ[5]
IRQ[6]
IRQ[7]
IRQ_MUX[0]
2G
2Y
IRQ_MUX[1]
74x153
1C0
1C1
1C2
1C3
2C0
2C1
2C2
2C3
A
B
1Y
1G
IRQ_MUX[2]
2G
2Y
IRQ_MUX[3]
IRQ[8]
IRQ[9]
IRQ[10]
IRQ[11]
IRQ[12]
IRQ[13]
IRQ[14]
IRQ[15]
ISA_CLK2X
ISA_CLK
Timer 0
Keyboard
Slave PIC
COM2/COM4
COM1/COM3
LPT2
Floppy
LPT1
RTC
Mouse
FPU
PCI / IDE
PCI / IDE
Floppy
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