參數(shù)資料
型號： STPCE1DDBI
英文描述： Microprocessor
中文描述： 微處理器
文件頁數(shù)： 29/87頁
文件大?。?/td> 1356K
代理商： STPCE1DDBI
STRAP OPTION
Release 1.3 - January 29, 2002
29/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
3.1.2. STRAP REGISTER 1 CONFIGURATION
Strap1
Access = 0022h/0023h
Regoffset = 04Bh
7
6
5
4
3
2
1
0
Rsv
MD11
MD10
Rsv
This register defaults to the values sampled on MD[11:10] pins after reset
Bit Number Sampled
Mnemonic
Description
Bits 7-6
Rsv
Reserved
Bits 5-4
Rsv
Reserved
Bit 3
MD11
Reserved
Bit 2
MD10
Reserved
Bits 1-0
Rsv
Reserved.
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