參數(shù)資料
型號(hào): STPC12HDYI
廠商: 意法半導(dǎo)體
英文描述: X86 Core PC Compatible System-on-Chip for Terminals
中文描述: x86內(nèi)核PC兼容系統(tǒng)上的終端芯片
文件頁(yè)數(shù): 61/111頁(yè)
文件大?。?/td> 1896K
代理商: STPC12HDYI
ELECTRICAL SPECIFICATIONS
Issue 1.0 - July 24, 2002
61/111
The
Table 4-15
below refers to Vh, Va, Vs which
are the register value for Setup time, Active Time
and Hold time, as described in the Programming
Manual.
Table 4-15. Local Bus cycle lenght
Cycle
T
setup
4 + Vh
4 + Vh
T
active
2 + Va
2 + Va
T
hold
4 + Vs
4 + Vs
T
end
4
4
Unit
HCLK
HCLK
Memory (FCSx#)
Peripheral (IOCSx#)
Table 4-16. Local Bus Interface AC Timing
Name
Parameters
HCLK to PA bus
HCLK to PD bus
HCLK to FCS#[1:0]
HCLK to IOCS#[3:0]
HCLK to PWR#, PRD#
HCLK to BE#[1:0]
PD[15:0] Input setup to HCLK
PD[15:0] Input hold to HCLK
PRDY Input setup to HCLK
PRDY Input hold to HCLK
Min
-
-
-
-
-
-
-
2
-
2
Max
15
15
15
15
15
15
4
-
4
-
Units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
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