參數(shù)資料
型號(hào): STPC12HDYI
廠商: 意法半導(dǎo)體
英文描述: X86 Core PC Compatible System-on-Chip for Terminals
中文描述: x86內(nèi)核PC兼容系統(tǒng)上的終端芯片
文件頁數(shù): 36/111頁
文件大?。?/td> 1896K
代理商: STPC12HDYI
STRAP OPTION
36/
111
Issue 1.0
- July 24, 2002
3.1.2. STRAP REGISTER 1
This register is read only.
STRAP1
Access = 0022h/0023h
Regoffset =04Bh
7
6
5
4
3
2
1
0
MD[40]
MD[14]
RSV
RSV
RSV
RSV
RSV
MD[36]
This register defaults to the values sampled on the MD pins after reset
Bit Number Sampled
Mnemonic
Description
Bits 7-6
MD[40] & MD[14]
CPU Clock Multiplication (486 mode):
MD14 MD40
1
0
X 1
1
1
X 2
All other settings are reserved
HCLK maximum speed is 66MHz and in CPU mode X2.
Operation in X1 mode is only guaranteed up to 66MHz.
Bits 5-1
Rsv
Reserved
Bit 0
MD[36]
These bits reflect the values sampled on MD[36] and determines the
Local Bus Boot device width:
0: 8-bit Boot Device
1: 16-bit Boot Device
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