- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄381117 > STPC12GEYI (意法半導(dǎo)體) X86 Core PC Compatible System-on-Chip for Terminals PDF資料下載
參數(shù)資料
| 型號(hào)： | STPC12GEYI |
| 廠(chǎng)商： | 意法半導(dǎo)體 |
| 英文描述： | X86 Core PC Compatible System-on-Chip for Terminals |
| 中文描述： | x86內(nèi)核PC兼容系統(tǒng)上的終端芯片 |
| 文件頁(yè)數(shù)： | 46/111頁(yè) |
| 文件大?。?/td> | 1896K |
| 代理商： | STPC12GEYI |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)當(dāng)前第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)
ELECTRICAL SPECIFICATIONS
46/111
Issue 1.0 - July 24, 2002
4.5. AC CHARACTERISTICS
This section lists the AC characteristics of the
STPC interfaces including output delays, input
setup requirements, input hold requirements and
output float delays. These measurements are
based on the measurement points identified in
Figure 4-1
and
Figure 4-2
. The rising clock edge
reference level VREF and other reference levels
are shown in
Table 4-9
below. Input or output
signals must cross these levels during testing.
Figure 4-1
shows output delay (A and B) and input
setup and hold times (C and D). Input setup and
hold times (C and D) are specified minimums,
defining the smallest acceptable sampling window
a synchronous input signal must be stable for
correct operation.
Note: Refer to
Figure 4-1
.
Table 4-9. Drive Level and Measurement Points for Switching Characteristics
Symbol
V
REF
V
IHD
V
ILD
Value
1.5
2.5
0.0
Units
V
V
V
Figure 4-1. Drive Level and Measurement Points for Switching Characteristics
CLK:
V
Ref
V
ILD
V
IHD
Tx
LEGEND:
A - Maximum Output Delay Specification
B - Minimum Output Delay Specification
C - Minimum Input Setup Specification
D - Minimum Input Hold Specification
V
Ref
Valid
Input
Valid
Output n+1
Valid
Output n
OUTPUTS:
INPUTS:
MAX
MIN
A
B
C
D
V
Ref
V
ILD
V
IHD
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| STPCI2GDY | X86 Core PC Compatible System-on-Chip for Terminals |
| STPCI2HEYC | X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12HEYI | X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12GDYI | X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12 | X86 Core PC Compatible System-on-Chip for Terminals |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STPC12HDYC | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12HDYI | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12HEYC | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12HEYI | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:X86 Core PC Compatible System-on-Chip for Terminals |
| STPC1MBBL | 制造商:Panduit Corp 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。