參數(shù)資料
型號(hào): STPC CLIENT
廠商: 意法半導(dǎo)體
英文描述: Multimedia PC on a Chip(多媒體PC)
中文描述: 多媒體電腦芯片(多媒體個(gè)人電腦)
文件頁(yè)數(shù): 1/34頁(yè)
文件大?。?/td> 379K
代理商: STPC CLIENT
STPC CLIENT
Multimedia PC on a Chip
1/34
9/12/98
Figure 1. Logic Diagram
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POWERFUL X86 PROCESSOR
64-BIT 66MHz BUS INTERFACE
64-BIT DRAM CONTROLLER
SVGA GRAPHICS CONTROLLER
UMA ARCHITECTURE
VIDEO SCALER
VIDEO OUTPUT PORT
VIDEO INPUT PORT
CRT CONTROLLER
135MHz RAMDAC
2 OR 3 LINE FLICKER FILTER
SCAN CONVERTER
PCI MASTER / SLAVE / ARBITER
ISA MASTER/SLAVE
IDE CONTROLLER
DMA CONTROLLER
INTERRUPT CONTROLLER
TIMER / COUNTERS
POWER MANAGEMENT
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DESCRIPTION
The STPC Client integrates a fully static x86 proc-
essor, fully compatible with standard x86 proces-
sors, and combines it with powerful chipset,
graphics and video pipelines to provide a single
Consumer orientated PC compatible subsystem
on a single device. The device is packaged in a
388 Ball Grid Array (PBGA).
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X86 Processor core
Fully static 32-bit 5-stage pipeline, x86
processor fully PC compatible.
Can access up to 4GB of external memory.
8Kbyte unified instruction and data cache
with write back and write through capability.
Parallel processing integral floating point unit,
with automatic power down.
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Host I/F
X86
Core
HDRAM
GDRAM
EIDE
ISA
82C206
PCI
Slave
PCI
Master/
Slave
PCI BUS
ISA BUS
Video Stream Input
Video
Port
Mux
Decimator
Capture
FIFO
Anti-
Flicker
External
Digital
PAL/NTSC
Encoder
Color
Space
RAMDAC
Color
Space
Con verter
LUT
Color/
Chroma
Key
DRAM
Format-
VGA
Attrib ute
Graphics
FIFO
V ideo
Line
Buffer
Scaling
&
Filtering
CRTC-
Timegen
HW Cursors
GE ADDRGEN
VDO AD DRGEN
CRTC ADDRGEN
GE S/D /PFIFO
Monitor
TV Output
HSYNC
VSYNC
BLANK
DATA
ADDRESS
DRAM
PBGA388
STPC CLENT
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