參數(shù)資料
型號: STM8L162R8T3
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP64
封裝: 10 X 10 MM, LQFP-64
文件頁數(shù): 9/116頁
文件大?。?/td> 1229K
代理商: STM8L162R8T3
Electrical parameters
STM8L162R8, STM8L162M8
Doc ID 17959 Rev 1
Figure 30.
ADC1 accuracy characteristics
Figure 31.
Typical connection diagram using the ADC
1.
Refer to Table 51 for the values of RAIN and CADC.
2.
Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy
this, fADC should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 32 or Figure 33,
depending on whether VREF+ is connected to VDDA or not. Good quality ceramic 10 nF
capacitors should be used. They should be placed as close as possible to the chip.
EO
EG
1LSBIDEAL
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
ET=Total Unadjusted Error: maximum deviation
between the actual and the ideal transfer curves.
EO=Offset Error: deviation between the first actual
transition and the first ideal one.
EG=Gain Error: deviation between the last ideal
transition and the last actual one.
ED=Differential Linearity Error: maximum deviation
between actual steps and the ideal one.
EL=Integral Linearity Error: maximum deviation
between any actual transition and the end point
correlation line.
4095
4094
4093
5
4
3
2
1
0
7
6
1
2
3
456
7
4093 4094 4095 4096
(1)
(2)
ET
ED
EL
(3)
VDDA
VSSA
ai14395b
VREF+
4096
(or
depending on package)]
VDDA
4096
[1LSBIDEAL =
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相關代理商/技術參數(shù)
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