參數(shù)資料
型號(hào)： STM8L162R8T3
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, LQFP-64
文件頁數(shù)： 71/116頁
文件大?。?/td> 1229K
代理商： STM8L162R8T3
Interrupt vector mapping
STM8L162R8, STM8L162M8
Doc ID 17959 Rev 1
20
TIM2/
USART2
Capture/Compare/USART
2 interrupt
--
Yes
0x00 8058
21
TIM3/
USART3
TIM3 Update
/Overflow/Trigger/Break/
USART3 transmission
complete/transmit data
register empty
interrupt
--
Yes
0x00 805C
22
TIM3/
USART3
TIM3 Capture/Compare/
USART3 Receive register
data full/overrun/idle line
detected/parity error/
interrupt
--
Yes
0x00 8060
23
TIM1
Update /overflow/trigger/
COM
--
-
0x00 8064
24
TIM1
Capture/Compare
-
0x00 8068
25
TIM4
Update/overflow/trigger
-
Yes
0x00 806C
26
SPI1
End of Transfer
Yes
0x00 8070
27
USART 1/
TIM5
USART1 transmission
complete/transmit data
register empty/
TIM5 update/overflow/
trigger/break
--
Yes
0x00 8074
28
USART 1/
TIM5
USART1 Receive register
data full/overrun/idle line
detected/parity error/
TIM5 capture/compare
--
Yes
0x00 8078
29
I2C1/SPI2
I2C1 interrupt(5)/
SPI2
Yes
0x00 807C
1.
The Low power wait mode is entered when executing a WFE instruction in Low power run mode.
2.
The TLI interrupt is the logic OR between TIM2 overflow interrupt, and TIM4 overflow interrupts.
3.
In WFE mode, this interrupt is served if it has been previously enabled. After processing the interrupt, the processor goes
back to WFE mode. When this interrupt is configured as a wakeup event, the CPU wakes up and resumes processing.
4.
The interrupt from PVD is logically OR-ed with Port E and F interrupts. Register EXTI_CONF allows to select between Port
E and Port F interrupt (see External interrupt port select register (EXTI_CONF) in the RM0031).
5.
The device is woken up from Halt or Active-halt mode only when the address received matches the interface address.
Table 10.
Interrupt mapping (continued)
IRQ
No.
Source
block
Description
Wakeup
from Halt
mode
Wakeup
from
Active-halt
mode
Wakeup
from Wait
(WFI
mode)
Wakeup
from Wait
(WFE
mode)(1)
Vector
address
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