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參數(shù)資料
| 型號： | STM6322ZWY6F |
| 廠商： | 意法半導體 |
| 英文描述： | 5-Pin Supervisor with Watchdog Timer and Push-button Reset |
| 中文描述： | 5引腳監(jiān)控，帶有看門狗定時器和按鈕復位 |
| 文件頁數(shù)： | 8/21頁 |
| 文件大?。?/td> | 315K |
| 代理商： | STM6322ZWY6F |
STM6321/6322/6821/6822/6823/6824/6825
8/21
Ensuring a Valid Reset Output Down to
V
CC
= 0V.
The STM6xxx Supervisors are guaran-
teed to operate properly down to V
CC
= 1V. In ap-
plications that require valid reset levels down to
V
CC
= 0, a pull-down resistor to active-low outputs
(push/pull only, see
Figure 9.
) and a pull-up resis-
tor to active-high outputs (push/pull only, see
Fig-
ure 10.
) will ensure that the reset line is valid while
the reset output can no longer sink or source cur-
rent. This scheme does not work with the open
drain outputs of the STM6321/6322/6822.
The resistor value used is not critical, but it must
be large enough not to load the reset output when
V
CC
is above the reset threshold. For most appli-
cations, 100k
is adequate.
Interfacing to Microprocessors with Bi-
directional Reset Pins
Microprocessors with bi-directional reset pins can
contend with the STM6321/6322/6821/6822/6823/
6824/6825 reset output. For example, if the reset
output is driven high and the microprocessor
wants to pull it low, signal contention will result. To
prevent this from occurring, connect a 4.7k
resis-
tor between the reset output and the microproces-
sor’s reset I/O as in
Figure 11.
.
Figure 9. Ensuring RST Valid to V
CC
= 0,
(Active-Low Push-pull Outputs)
Figure 10. Ensuring RST Valid to V
CC
= 0,
(Active-High, Push-pull Outputs)
Note: This configuration does not work on open drain outputs of the
STM6321/6322/6822.
Figure 11. Interfacing to Microprocessors with
Bi-directional Reset I/O
AI09138
STM6XXX
RST
GND
V
CC
V
CC
R1
AI09139
STM6XXX
RST
GND
V
CC
V
CC
R1
AI09135
STM6XXX
RST
GND
4.7k
V
CC
Microprocessor
RST
Buffered Reset to other
System Components
GND
V
CC
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