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參數(shù)資料
| 型號： | STM6322ZWY6F |
| 廠商： | 意法半導體 |
| 英文描述： | 5-Pin Supervisor with Watchdog Timer and Push-button Reset |
| 中文描述： | 5引腳監(jiān)控，帶有看門狗定時器和按鈕復位 |
| 文件頁數(shù)： | 7/21頁 |
| 文件大?。?/td> | 315K |
| 代理商： | STM6322ZWY6F |
7/21
STM6321/6322/6821/6822/6823/6824/6825
OPERATION
Reset Output
The STM6xxx Supervisor asserts a reset signal to
the MCU whenever V
CC
goes below the reset
threshold (V
RST
), a watchdog time-out occurs, or
when the Push-button Reset Input (MR) is taken
low. Reset is guaranteed valid for V
CC
< V
RST
down to V
CC
=1V for T
A
= 0°C to 85°C.
During power-up, once V
CC
exceeds the reset
threshold an internal timer keeps reset low for the
reset time-out period, t
rec
. After this interval reset
is de-asserted.
Each time RST is asserted, it stays low for at least
the reset time-out period (t
rec
). Any time V
CC
goes
below the reset threshold the internal timer clears.
The reset timer starts when V
CC
returns above the
reset threshold.
Open Drain RST Output
The STM6321/6322/6822 have an active-low,
open drain reset output. This output structure will
sink current when RST is asserted. Connect a pull-
up resistor from RST to any supply voltage up to
6V (see
Figure 8.
). Select a resistor value large
enough to register a logic low, and small enough
to register a logic high while supplying all input cur-
rent and leakage paths connected to the reset out-
put line. A 10k
pull-up resistor is sufficient in
most applications.
Figure 8. STM6321/6322/6822 Open Drain RST
Output with Multiple Supplies
Note: 1. STM6322/6822
2. STM6321/6822
3. STM6321/6322
Push-button Reset Input (STM6322/6821/6822/
6823/6825)
A logic low on MR asserts reset. Reset remains
asserted while MR is low, and for t
rec
(see
Figure
22., page 15
) after it returns high. The MR input
has an internal 52k
pull-up resistor, allowing it to
be left open if not used. This input can be driven
with TTL/CMOS-logic levels or with open-drain/
collector outputs. Connect a normally open mo-
mentary switch from MR to GND to create a man-
ual reset function; external debounce circuitry is
not required. If MR is driven from long cables or
the device is used in a noisy environment, connect
a 0.1μF capacitor from MR to GND to provide ad-
ditional noise immunity. MR may float, or be tied to
V
CC
when not used.
Watchdog Input (STM6321/6821/6822/6823/
6824)
The watchdog timer can be used to detect an out-
of-control MCU. If the MCU does not toggle the
Watchdog Input (WDI) within t
WD
(1.6sec), the re-
set is asserted. The internal watchdog timer is
cleared by either:
1.
a reset pulse, or
2.
by toggling WDI (high-to-low or low-to-high),
which can detect pulses as short as 50ns.
The timer remains cleared and does not count for
as long as reset is asserted. As soon as reset is re-
leased, the timer starts counting.
Note:
The watchdog function may be disabled by
floating WDI or tri-stating the driver connected to
WDI. When tri-stated or disconnected, the maxi-
mum allowable leakage current is 10uA and the
maximum allowable load capacitance is 200pF.
Applications Information
Watchdog Input Current.
The WDI input is inter-
nally driven through a buffer and series resistor
from the watchdog counter. For minimum watch-
dog input current (minimum overall power con-
sumption), leave WDI low for the majority of the
watchdog time-out period. When high, WDI can
draw as much as 160μA. Pulsing WDI high at a
low duty cycle will reduce the effect of the large in-
put current. When WDI is left unconnected, the
watchdog timer is serviced within the watchdog
time-out period by a low-high-low pulse from the
counter chain.
AI09137
STM6XXX
MR
(1)
WDI
(2)
RST
(3)
RST
GND
10k
V
CC
5V System
5.0V
3.3V
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