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參數(shù)資料
| 型號(hào)： | STEL-1375A+80 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, DIP35 |
| 封裝： | 2.500 X 1.300 INCH, 0.350 INCH HEIGHT, DIP-35 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 202K |
| 代理商： | STEL-1375A+80 |
3
STEL-1375A+80
The STEL-1375A+80 is a complete Digital Direct
Frequency Synthesizer in a single DIL package
measuring only 2.5 x 1.3". The STEL-1375A+80 makes
it possible to use DDS technology in places where
space constraints previously made this impossible.
The STEL-1375A+80 is a printed circuit unit using the
STEL-1175 Modulated Numerically Controlled
Oscillator (MNCO) chip driving a high-speed 10-bit
DAC (AD9721) to generate an analog output signal.
Surface mount technology (SMT) components are used
throughout. The device is guaranteed to operate at
clock frequencies up to 80 MHz over the temperature
range of 0-70
°C, giving an output frequency range of 0
to over 35 MHz, with a frequency resolution of 19 milli-
Hz (32 bits). In addition, the device features both
phase and frequency modulation capabilities at
extremely high modulation rates, up to 25% of the
clock frequency. The phase modulation capability
allows either digital (PSK) or linear PM with up to 12
bits of resolution to be implemented. Binary FSK can
be implemented very easily by loading the two
frequencies into the A and B frequency registers, and
any kind of frequency modulation can be performed
by modulating the frequency control word. For more
detailed information on the STEL-1175 MNCO please
refer to the STEL-1175 data sheet. For more information
on the DAC please refer to the AD9721 data sheet. The
output frequency is directly related to the clock
frequency by the following:
fc x -Phase
fo=
232
where: fo is the frequency of the output signal
and:
fc is the clock frequency.
Package: 35-pin DIP
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
0.45" ± .005"
0.35" ± .005"
2.5" ± .01"
1.3" ± .01"
0.4" max.
0.2" max.
0.1" ± .005"
Pin diameter: 0.018" ± .002"
1.2" ± .01"
Component area, unencapsulated
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
28
CSEL
29
VSS
30
CIN
31
VDD
32
DVEE (DAC)
33
AVEE (DAC)
34
VSS
35
OUT
10
ADDR0
11
DATA7
12
DATA6
13
DATA5
14
DATA4
15
DATA3
16
DATA2
17
DATA1
18
DATA0
19
FRSEL
20
SINE
21
VSS
22
FRLD
23
RESET
24
PHLD
25
WRSTB
26
PHSEL
27
VDD
PIN CONNECTIONS
1VSS
2
CLOCK
3
N.C.
4VSS
5VDD
6VEE**
7
ADDR3
8
ADDR2
9
ADDR1
PIN CONFIGURATION
**
Pin 6 is not used in the STEL-1375A+80. This pin may be connected to
VEE for pin compatibility with the STEL-1375A (60 MHz version).
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