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參數(shù)資料
| 型號： | STD55NH2LLT4 |
| 廠商： | 意法半導體 |
| 英文描述： | N-channel 24V - 0.010ohm - 40A - DPAK/IPAK Ultra low gate charge STripFET TM Power MOSFET |
| 中文描述： | N溝道24V的- 0.010ohm - 40A條-的DPAK /像是iPak超低柵極電荷STripFET商標功率MOSFET |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 485K |
| 代理商： | STD55NH2LLT4 |
Electrical characteristics
STD55NH2LL - STD55NH2LL-1
4/16
2
Electrical characteristics
(T
CASE
=25°C unless otherwise specified)
Table 3.
On/off states
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
breakdown voltage
I
D
= 25mA, V
GS
=0
24
V
I
DSS
Zero gate voltage
drain current (V
GS
= 0)
V
DS
= max rating
V
DS
= max rating
T
C
= 125°C
1
10
μA
μA
I
GSS
Gate-body leakage
current (V
DS
= 0)
V
GS
= ± 16V
±100
nA
V
GS(th)
Gate threshold voltage
V
DS
= V
GS
, I
D
= 250μA
1
V
R
DS(on)
Static drain-source on
resistance
V
GS
= 10V, I
D
= 20A
V
GS
= 4.5V, I
D
= 20A
0.010
0.012
0.011
0.0135
Table 4.
Dynamic
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
g
fs (1)
1.
Pulsed: Pulse duration = 300 μs, duty cycle 1.5 %.
Qoss = Coss*
Vin , Coss = Cgd + Cds . See
Chapter 4: Appendix A
Forward
transconductance
V
DS
= 10V
,
I
D
= 10A
18
S
C
iss
C
oss
C
rss
Input capacitance
Output capacitance
Reverse transfer
capacitance
V
DS
= 25V, f = 1MHz,
V
GS
= 0
990
385
40
pF
pF
pF
R
G
Gate Input Resistance
f = 1 MHz Gate
DC Bias = 0 Test Signal
Level = 20 mV Open
Drain
1.3
t
d(on)
t
r
t
d(off)
t
f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 10V, I
D
= 20A
R
G
= 4.7
V
GS
= 4.5V
(see
Figure 13
)
15
56
13
10
ns
ns
ns
ns
Q
g
Q
gs
Q
gd
Total gate charge
Gate-source charge
Gate-drain charge
0.44V
≤
V
DD
≤
10V,
I
D
= 40A,
V
GS
= 4.5V, R
G
= 4.7
(see
Figure 14
)
8.7
4.2
2.4
11
nC
nC
nC
Q
oss(2)
2.
Output charge
V
DS
= 16 V, V
GS
= 0 V
7.6
nC
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