參數(shù)資料
型號(hào): STCF03
廠商: 意法半導(dǎo)體
元件分類: LED驅(qū)動(dòng)器
英文描述: High power white LED driver with I2C⑩ interface
中文描述: 大功率白光LED驅(qū)動(dòng)器具有I2C⑩接口
文件頁(yè)數(shù): 22/35頁(yè)
文件大?。?/td> 455K
代理商: STCF03
Description of internal registers
STCF03
22/35
8.8
AUXI_0~3
This 4 bits register defines the AUX LED current from 0 to 20 mA. See AUX LED Dimming
Table for reference. Loading any value between 1 and 15 also starts the AUX LED current
source timer, if enabled. The AUX LED current source is active only in Ready Mode, and is
deactivated in any other mode.
8.9
AUXT_0~3
This 4 bit register controls the timer that defines the ON-time of the AUX LED current
source. ON-time starts when the AUXI register is loaded with any value other than zero, and
stops after the time defined in the AUXT register. Values from 1 to 14 of the AUXT register
correspond to an ON-time of the AUX LED ranging from 100 to 1400 ms in 100 ms steps.
The value 15 puts the AUX LED to the continuous light mode. The activation/deactivation of
the AUX LED current source is controlled using only the AUXI register.
Note:
LED current values refer to R
FL
=0.27
Ω
, R
TR
=1.8
Ω.
Table 12. Auxiliary register
AUX_REG
(write mode)
MSB
LSB
SUB ADD=02
AUXI_3
AUXI_2
AUXI_1
AUXI_0
AUXT_3
AUXT_2
AUXT_1
AUXT_0
Power ON,
SHUTDOWN MODE
RESET Value
0
0
0
0
0
0
0
0
Table 13. Auxiliary led dimming table
(1)
AUXI (hex)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
AUX LED
current [mA]
0.0
1.3
2.6
4.0
5.3
6.6
8.0
9.3
10.6 12.0 13.3 14.6 16.0 17.3 18.6 20.0
1.
20 mA output current is achievable only if the supply voltage is higher than 3.3 V.
Table 14. Torch Mode and Flash Mode dimming registers settings
T_DIM
(hex)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
F_DIM
(hex)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
LED
current
[mA]
16
19
23
27
32
39
46
55
65
77
92
109
124 147 175 209 248 296 352 418 498 592 705 840
Internal
step
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
V
REF1
[mV]
33
40
47
56
67
80
95
113
134
160
190
227
33
40
47
56
67
79
95
113 134 160 190 227
Sense
Resist.
R
FL
+
R
TR
R
FL
+
R
TR
R
FL
+
R
TR
R
FL
+
R
TR
R
FL
+
R
TR
R
FL
+
R
TR
R
FL
+
R
TR
R
FL
+
R
TR
R
FL
+
R
TR
R
FL
+
R
TR
R
FL
+
R
TR
R
FL
+
R
TR
R
FL
R
FL
R
FL
R
FL
R
FL
R
FL
R
FL
R
FL
R
FL
R
FL
R
FL
R
FL
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