參數(shù)資料
型號(hào)： STAC9711
廠商： Electronic Theatre Controls, Inc.
元件分類： Codec
英文描述： Multi-Channel AC97 Codec With Multi-Codec Option
中文描述： 多聲道AC97編解碼器與多編解碼器方案
文件頁(yè)數(shù)： 37/56頁(yè)
文件大?。?/td> 247K
代理商： STAC9711
SigmaTel, Inc.
Preliminary
STAC9708/11
37
10/02/98
AC'97 Digital Controller must
invalidate
the tag bits for Slot 1 and 2 Command Address and Data (Slot 0, bits 14
and 13) and place a
non-zero
value (01, 10, or 11) into the Codec ID field (Slot 0, bits 1 and 0).
As a Secondary Codec, the
STAC9708/11
will disregard the Command Address and Command Data (Slot 0, bits
14 and 13) tag bits when it sees a 2-bit Codec ID value (Slot 0, bits 1 and 0) that matches its configuration. In a
sense the Secondary Codec ID field functions as an alternative Valid Command Address (for Secondary reads and
writes) and Command Data (for Secondary writes) tag indicator.
Secondary Codecs must monitor the Frame Valid bit, and ignore the frame (regardless of the state of the
Secondary Codec ID bits) if it is not valid. AC'97 Digital Controllers should set the frame valid bit for a frame
with a secondary register access, even if no other bits in the output tag slot except the Secondary Codec ID bits
are set.
This method is designed to be backward compatible with existing AC'97 controllers and Codecs. There is no
change to output Slot 1 or 2 definitions.
Table 22.
Secondary Codec Register Access Slot 0 Bit Definitions
Output Tag Slot (16-bits)
Bit
15
14
13
12-3
2
1-0
New definitions for Secondary Codec Register Access
Description
Frame Valid
Slot 1 Valid Command Address bit
Slot 2 Valid Command Data bit (Primary Codec only)
Slot 3-12 Valid bits as defined by AC'97
Reserved
(Set to “0”)
2-bit Codec ID field (00 reserved for Primary; 01, 10, 11 indicate Secondary)
(Primary Codec only)
7. TESTABILITY
The
STAC9708/11
has two test modes. One is for ATE in-circuit test and the other is restricted for
SigmaTel’s
internal use.
STAC9708/11
enters the ATE in circuit test mode if SDATA_OUT is sampled high at the trailing
edge of RESET#. Once in the ATE test mode, the digital AC-Link outputs (BIT_CLK and SDATA_IN) are
driven to a high impedance state. This allows ATE in-circuit testing of the AC'97 controller. This case will
never occur during standard operating conditions. Once either of the two test modes have been entered, the
STAC9704/7
must be issued another rest with all AC-link signals held low to return to the normal operating
mode.
相關(guān)PDF資料
PDF描述
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