參數(shù)資料
型號： STAC9711
廠商： Electronic Theatre Controls, Inc.
元件分類： Codec
英文描述： Multi-Channel AC97 Codec With Multi-Codec Option
中文描述： 多聲道AC97編解碼器與多編解碼器方案
文件頁數(shù)： 22/56頁
文件大?。?/td> 247K
代理商： STAC9711
SigmaTel, Inc.
Preliminary
STAC9708/11
22
10/02/98
Figure 10
.
STAC9708/11
Powerdown Timing
SYNC
BIT_CLK
SDATA_OUT
peslot2
SDATA_IN
TAG
0x20
Data
PR4
pslot2
TAG
Note: BIT_CLK not to scale
BIT_CLK and SDATA_IN are transitioned low immediately (within the maximum specified time) following
the decode of the write to the Powerdown Register (26h) with PR4. When the AC'97 controller driver is at
the point where it is ready to program the AC-Link into its low power mode, slots (1 and 2) are assumed to
be the only valid stream in the audio output frame (all sources of audio input have been neutralized).
The AC'97 controller should also drive SYNC, and SDATA_OUT low after programming the
STAC9708/11
to this low power mode.
3.2.1 Waking up the AC-Link
Once the
STAC9708/11
has halted BIT_CLK, there are only two ways to “wake up” the AC-Link.
Both methods must be activated by the AC'97 controller. The AC-Link protocol provides for a “Cold
AC'97 Reset”, and a “Warm AC'97 Reset”. The current power down state would ultimately dictate
which form of reset is appropriate. Unless a “cold” or “register” reset (a write to the Reset register) is
performed, wherein the AC'97 registers are initialized to their default values, registers are required to
keep state during all power down modes. Once powered down, re-activation of the AC-Link via re-
assertion of the SYNC signal must not occur for a minimum of 4 audio frame times following the frame
in which the power down was triggered. When AC-Link powers up it indicates readiness via the Codec
Ready bit (input slot 0, bit 15).
Cold Reset
- a cold reset is achieved by asserting RESET# for the minimum specified time. By driving
RESET# low, BIT_CLK, and SDATA_IN will be activated, or re-activated as the case may be, and all
STAC9708/11
control registers will be initialized to their default power on reset values.
Note: RESET# is an asynchronous input. # denotes active low
相關(guān)PDF資料
PDF描述
STAC9711T Multi-Channel AC97 Codec With Multi-Codec Option
STC12LE0154 Silver Mica Capacitor; Capacitance:3000pF; Capacitance Tolerance:+/- 5%; Series:CDV30; Voltage Rating:2500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:11.1mm; Leaded Process Compatible:No RoHS Compliant: No
STC12LE0154AD Silver Mica Capacitor; Capacitance:330pF; Capacitance Tolerance: 5%; Series:CDV30; Voltage Rating:2500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:11.1mm; Leaded Process Compatible:No RoHS Compliant: No
STC12LE0254 Silver Mica Capacitor; Capacitance:470pF; Capacitance Tolerance:+/- 5%; Series:CDV30; Voltage Rating:2500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:11.1mm; Leaded Process Compatible:No RoHS Compliant: No
STC12LE0254AD Silver Mica Capacitor; Capacitance:510pF; Capacitance Tolerance:+/- 5%; Series:CDV30; Voltage Rating:2500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:11.1mm; Leaded Process Compatible:No RoHS Compliant: No
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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