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參數(shù)資料
| 型號(hào)： | STA7360 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 20W BRIDGE/STEREO AUDIO AMPLIFIER WITH CLIPPING DETECTOR |
| 中文描述： | 20瓦橋/立體聲音頻放大器，具有裁剪探測(cè)器 |
| 文件頁(yè)數(shù)： | 15/18頁(yè) |
| 文件大?。?/td> | 481K |
| 代理商： | STA7360 |
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STA7360
T1
≈
120 · C
out
T2
≈
1200 · C
svr
The turn-on delay is given by:
T1+T2 STEREO
T2 BRIDGE
The best performance is obtained by driving the st-by
pin with a ramp having a slope slower than 2V/ms
TURN-OFF
A turn-off pop can occur if the st-by pin goes low with
a short time constant.This pop is due to the fast
switch-off of the internal current generator of the am-
plifier.If the voltage present across the load becomes
rapidly zero (due to the fast switch off) a small pop
occurs, depending also on Cout,Rload.
The parameters that set the switch off time constant
of the st-by pin are:
I
the st-by capacitor (C4)
I
the SVR capacitor (Csvr)
I
resistors connected from st-by pin to the logical
input (Rext)
BALANCED INPUT IN BRIDGE CONFIGURATION
A helpful characteristic of the STA7360 is that,in
bridge configuration, a signal present on both the in-
put capacitors is amplified by the same amount and
it is present in phase at the outputs,so this signal
does not produce effects on the load.The typical val-
ue of CMRR is 46dB.
Looking at fig 35, we can see that a noise signal from
the ground of the power amplifier to the ground of the
hypothetical preamplifier is amplified of a factor equal
to the gain of the amplifier (2 * Gv).
Using a configuration of fig. 36 the same ground
noise is present at the output multiplied by the factor
2 * Gv/200.
This means less distortion,less noise (e.g. motor cas-
sette noise) and/or a simplification of the layout of PC
board.
The only limitation of this balanced input is the maxi-
mum amplitude of common mode signals (few tens of
millivolt) to avoid a loss of output power due to the
common mode signal on the output, but in a large
number of cases this signal is within this range.
Figure 34.
b) C
svr
= 47
μ
F
c) C
svr
= 100
μ
F
(*) These parameters must be validated after final silicon character-
ization.
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