參數(shù)資料
型號: STA304
廠商: 意法半導(dǎo)體
英文描述: DIGITAL AUDIO PROCESSOR WITH MULTICHANNEL DDX⑩
中文描述: 數(shù)字音頻處理器多通道的DDX⑩
文件頁數(shù): 21/30頁
文件大?。?/td> 335K
代理商: STA304
STA304
21/30
13.0REGISTER SUMMARY
13.1Reset Register (add. 00h)
Writing any value to this register performs a register reset, which causes all registers to revert to their default
values. Reading this register returns 00E4h as it is the ID code of the part and its 3D Stereo Enhancement type
(See AC'97 revision 2.1 specification, section 6.3.1).
13.2LR Volume Register (add. 02h)
This register manage the stereo (both right and left channels) output signal volumes. The MSB of the register
is the mute bit. When this bit is set to 1 the level for that channel is set at -
dB. ML6 through ML0 is for the left
channel level, MR6 through MR0 is for the right channel.
There are two options: in 'Full Compliance' operating mode (bit 0 in the CRA register, address 5Ah, is set to '0')
only 6 bits are active (Mx0 to Mx5) and each step corresponds to 1.5 dB. In 'Proprietary' mode (bit 0 in the CRA
register is set to '1') Mx0 to Mx6 can have the values between 0h to 68h (110 1000) and each step corresponds
to 1dB. Greater values are undefined.
The default value is 8000h (1000 0000 0000 0000), which corresponds to 0 dB attenuation with mute on.
'Full Compliance' Mode
'Proprietary' Mode
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
0
0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Mute
ML6
ML5
ML4
ML3
ML2
ML1
ML0
X
MR6
MR5
MR4
MR3
MR2
MR1
MR0
Mute
Mx6…Mx0
Function
0
x00 0000
0 dB Attenuation
0
x01 1111
46.5dB Attenuation
0
x11 1111
94.5dB Attenuation
1
xxx xxxx
dB Attenuation
Mute
Mx6…Mx0
Function
0
000 0000
0 dB Attenuation
0
001 1111
31dB Attenuation
0
011 1111
63dB Attenuation
...
0
110 0001
97
dB Attenuation
0
110 0010
99dB Attenuation
0
110 0011
100dB Attenuation
0
110 0100
102dB Attenuation
0
110 0101
104dB Attenuation
0
110 0110
107dB Attenuation
0
110 0111
111dB Attenuation
0
110 1000
dB Attenuation
dB Attenuation
1
xxx xxxx
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