參數(shù)資料
型號(hào): STA304
廠商: 意法半導(dǎo)體
英文描述: DIGITAL AUDIO PROCESSOR WITH MULTICHANNEL DDX⑩
中文描述: 數(shù)字音頻處理器多通道的DDX⑩
文件頁數(shù): 14/30頁
文件大?。?/td> 335K
代理商: STA304
STA304
14/30
Figure 7. Powerdown management
In order to avoid any possible pop-noise while switching between the various powerdown modes a particular
masking technique has been adopted to drive the actual controlling signals: as shown in the above figure the 3
powerdown requests will inform the DSP using the related bits in specific registers. After that the DSP performs
a software fade-out of the channels volume and, finally, activates the MUTE flags of the various channels.
The actual controlling lines are the result of a logical AND operation between the relative request signals and
the 4 channel MUTE bits (LR, LFE, SL and SR).
Moreover the external power chip will be turned off (via the EAPD pin) not only as a consequence of an EAPD request,
but also as a consequence of a PR5 or PWDN requests: this solution will prevent any possible noise or glitch.
&
Internal CK disable
&
Chip powerdown
&
DSP
Requests
OR
EAPD (reg. 26h, bit 15)
PWDN pin (reg.7EFh, bit0)
PR5 (reg.26h, bit 13)
EAPD pin (ACTIVE Low)
(Active Low)
LR
LFE
SL
SR
&
LR
LFE
SR
SL
reg. 02h bit 15
reg. 36h bit 15
reg. 38h bit 07
reg. 38h bit 15
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