參數(shù)資料
型號: ST93C56
廠商: 意法半導體
元件分類: DRAM
英文描述: The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述: 該CAT24FC02是一個2 KB的EEPROM的國內(nèi)256個8位每字舉辦的串行CMOS
文件頁數(shù): 7/13頁
文件大小: 107K
代理商: ST93C56
AI00878C
1 1 0 An
A0
Qn
Q0
DATA OUT
D
S
Q
READ
S
WRITE
ADDR
OP
CODE
1 0
An
A0
DATA IN
D
Q
OP
CODE
Dn
D0
1
BUSY
READY
S
ERASE
WRITE
ENABLE
1
0
Xn X0
D
OP
CODE
1
0
1
S
ERASE
WRITE
DISABLE
1
0
Xn X0
D
OP
CODE
0
0
0
CHECK
STATUS
ADDR
Figure6. READ, WRITE, EWEN, EWDS Sequences
(Q = 0) will be returned if S is driven high, and the
ST93C56will ignoreanydataon thebus.Whenthe
write cycle is completed, theReady signal (Q = 1)
will indicate (if S is driven high) that the ST93C56
is readyto receiveanewinstruction. Programming
is internallyself-timed (the externalclock signal on
C input may be disconnected or left running after
the start of a programming cycle) and does not
require an Erase instruction prior to the Write in-
struction (The Write instruction includes an auto-
matic erase cycle before programing data).
Notes:
1. An: n = 7 for x16 org. and 8 for x8 org.
2. Xn: n = 5 for x16 org. and 6 for x8 org.
7/13
ST93C56/56C, ST93C57C
相關(guān)PDF資料
PDF描述
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