參數(shù)資料
型號(hào): ST93C56
廠商: 意法半導(dǎo)體
元件分類(lèi): DRAM
英文描述: The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述: 該CAT24FC02是一個(gè)2 KB的EEPROM的國(guó)內(nèi)256個(gè)8位每字舉辦的串行CMOS
文件頁(yè)數(shù): 5/13頁(yè)
文件大小: 107K
代理商: ST93C56
Figure5. Synchronous Timing,Read or Write
AI00820C
C
D
Q
ADDRESS INPUT
Hi-Z
tDVCH
tCLSL
A0
S
DATA OUTPUT
tCHQV
tCHDX
tCHQL
An
tSLSH
tSLQZ
Q15/Q7
Q0
AI01429
C
D
Q
ADDRESS/DATA INPUT
Hi-Z
tDVCH
tSLCH
A0/D0
S
WRITE CYCLE
tSLSH
tCHDX
An
tCLSL
tSLQZ
BUSY
tSHQV
tW
READY
MEMORY ORGANIZATION
The ST93C56 is organized as 256 bytes x8 bits or
128 wordsx 16 bits. If the ORG input is left uncon-
nected (or connectedto V
CC
) the x16 organization
is selected, when ORG is connected to Ground
(V
SS
) the x8 organization is selected. When the
ST93C56 is in standby mode, the ORG input
should be unconnectedor set to either V
SS
or V
CC
in orderto achieve the minimumpower consump-
tion. Any voltagebetween V
SS
and V
CC
applied to
ORG may increase the standby current value.
POWER-ONDATA PROTECTION
In orderto prevent datacorruption andinadvertent
write operations during power up, a Power On
Reset(POR)circuitresetsallinternalprogramming
circuitry and sets the device in the Write Disable
mode. WhenV
CC
reachesits functionalvalue, the
deviceis properlyreset (in theWrite Disable mode)
and is ready to decode and execute an incoming
instruction. A stable V
CC
must be applied, before
applyingany logic signal.
5/13
ST93C56/56C, ST93C57C
相關(guān)PDF資料
PDF描述
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參數(shù)描述
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ST93C56B1013TR 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:2K 128 x 16 or 256 x 8 SERIAL MICROWIRE EEPROM
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