參數(shù)資料
型號: ST72T141K2M3XXX
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDSO34
封裝: 0.300 INCH, PLASTIC, SO-34
文件頁數(shù): 96/132頁
文件大?。?/td> 1494K
代理商: ST72T141K2M3XXX
ST72141K
66/132
MOTOR CONTROLLER (Cont’d)
8.1.5 Low Power Modes
Before executing a HALT or WFI instruction, soft-
ware must stop the motor, and may choose to put
the outputs in high impedance.
8.1.6 Interrupts
The MTC interrupt events are connected to the
three interrupt vectors (see Interrupts chapter).
They generate an interrupt if the corresponding
Enable Control Bit is set and the I-bit in the CC
register is reset (RIM instruction).
Mode
Description
WAIT
No effect on MTC interface.
MTC interrupts exit from Wait mode.
HALT
MTC registers are frozen.
In Halt mode, the MTC interface is in-
active. The MTC interface becomes
operational again when the MCU is
woken up by an interrupt with “exit
from Halt mode” capability.
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
Ratio increment
RPI
RIM
Yes
No
Ratio decrement
RMI
Yes
No
Multiplier overflow
OI
OIM
Yes
No
Emergency Stop
EI
EIM
Yes
No
BEMF Zero-Crossing
ZI
ZIM
Yes
No
End of Demagnetization
DI
DIM
Yes
No
Commutation
CI
CIM
Yes
No
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