參數(shù)資料
型號(hào)： ST7263BK1B/XXX
廠(chǎng)商： STMICROELECTRONICS
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32
封裝： 0.400 INCH, LEAD FREE, SHRINK, PLASTIC, DIP-32
文件頁(yè)數(shù)： 34/140頁(yè)
文件大小： 1423K
代理商： ST7263BK1B/XXX
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ST7263B
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15 DEVICE CONFIGURATION AND ORDERING INFORMATION
Each device is available for production in user pro-
grammable versions (High Density FLASH) as
well as in factory coded versions (FASTROM).
ST72P63B devices are Factory Advanced Service
Technique ROM (FASTROM) versions: they are
factory programmed FLASH devices.
ST72F63B FLASH devices are shipped to custom-
ers with a default content (FFh).
This implies that FLASH devices have to be con-
figured by the customer using the Option Byte
while the ROM devices are factory-configured.
15.1 OPTION BYTE
The Option Byte allows the hardware configuration
of the microcontroller to be selected.
The Option Byte has no address in the memory
map and can be accessed only in programming
mode using a standard ST7 programming tool.
The default contents of the FLASH is fixed to F7h.
This means that all the options have “1” as their
default value, except LVD.
In ROM devices, the Option Byte is fixed in hard-
ware by the ROM code.
OPTION BYTE
OPT 7:6 = Reserved.
OPT 5 = WDGSW Hardware or Software Watch-
dog
This option bit selects the watchdog type.
0: Hardware enabled
1: Software enabled
OPT 4 = WDHALT Watchdog and HALT mode
This option bit determines if a RESET is generated
when entering HALT mode while the Watchdog is
active.
0: No Reset generation when entering Halt mode
1: Reset generation when entering Halt mode
OPT 3 = LVD Low Voltage Detector selection
This option bit selects the LVD.
0: LVD enabled
1: LVD disabled
Important note: on 4K and 8K ROM devices listed
below, this option bit is forced by ST to 0 (LVD
always enabled):
ST7263BK1M1, ST7263BK2M1
ST7263BK2B1, ST7263BK2B1
OPT 2 = Reserved.
OPT 1 = OSC24/12 Oscillator Selection
This option bit selects the clock divider used to
drive the USB interface at 6MHz.
0: 24 MHz oscillator
1: 12 Mhz oscillator
OPT 0 = FMP_R Flash memory read-out protec-
tion
This option indicates if the user flash memory is
protected against read-out. Read-out protection,
when selected, provides a protection against Pro-
gram Memory content extraction and against write
access to Flash memory. Erasing the option bytes
when the FMP_R option is selected, causes the
whole user memory to be erased first and the de-
vice can be reprogrammed. Refer to the ST7 Flash
Programming Reference Manual and section 4.3.1
on page 14 for more details.
0: Read-out protection enabled
1: Read-out protection disabled
70
--
WDG
SW
WD
HALT
LVD
--
OSC
24/12
FMP_
R
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