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參數(shù)資料
| 型號： | ST6399 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | MOSFET; Transistor Polarity:P Channel; Drain Source Voltage, Vds:-30V; Continuous Drain Current, Id:-4.1A; On-Resistance, Rds(on):0.08ohm; Rds(on) Test Voltage, Vgs:-10V; Package/Case:8-1206; Leaded Process Compatible:No |
| 中文描述： | 8位微控制器HCMOS電視頻率合成帶OSD |
| 文件頁數(shù)： | 54/68頁 |
| 文件大?。?/td> | 560K |
| 代理商： | ST6399 |
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Column
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Page
A5
A4
LINE
5
0
0
1
FT
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
5
0
1
2
FT
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
5
1
0
3
FT
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
5
1
1
4
FT
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
6
0
0
5
FT
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
Ch
AVAILABLE SCREEN SPACE
Table 15. OSD RAMMap
ON-SCREEN DISPLAY
(Continued)
Notes:
FT. Theformat character required for each line. Characters
in columns1 thru 15 are displayed.
Ch. (Byte) Character (IndexintoOSD character generator) or
space character
Emulator Remarks
There area fewdifferences between emulatorand
silicon. For noise reasons, the OSD oscillator pins
are not available: the internal oscillator cannot be
disabled and replaced by an external coil. In the
emulator, the Character Bank Select register can
be writtenalso withGlobal Enable bitset,while this
is notallowedin the device.
Application Notes
1
- The OSDcharactergenerator is composed ofa
dual port video ram and some circuitry. It needs
two input signals VSYNCand HSYNC to syncron-
ize itsdedicated oscillatorto the TV picture. Itgen-
erates 4 output signals, that can be used from the
TV set to generate the characters on the screen.
For instance,they can be used to feed the SCART
plug, providingan adequate bufferto drive the low
impedance(75
) of the SCART inputs.
2
- The Core sees the OSD as a number of RAM
locations (80)plus a certain numberof controlreg-
isters (6). These 86 locations are mapped in two
pages of the dynamic data ram address range
(0h..3Fh).
In page 5(load 20Hin the register0E8h),thereare
64 bytes of RAM, the ones of the first 4 rows (16
bytes each row, 15 characters per row maximum,
plus anhidden leadingformatcharacter).Inpage 6
(load 40Hin register0E8h),the 16 bytesof thefifth
row
(0..0Fh),
and
the
(10H..14H,17H).
3
- The videoRAM is a dual port ram. That means
that it can be addressed either from the Core or
from the OSD circuitry itself. To reduce the com-
plexity of the circuitry, and thus its cost, some re-
strictions have been introduced in the use of the
OSD.
a.
The Core can Only write to any of the 86 loca-
tions (eithervideo RAM or control registers).
b.
The Core can Only write to any of the leading
85 locations when the OSD oscillator is OFF.
Only the last location (control register 17H in
page 6) can be addressed at any time. This is
the Global Enable Register, which contains
only the GEbit. If itis set,the OSDis on, if it is
reset the OSD is off.
4
- The timing of the on/off switching of the OSD
oscillator is the following:
a.
GE bit is set. The OSD oscillator will start on
the next VSYNCsignal.
b.
GE bit is reset. The OSD oscillator will be im-
mediately switched off.
6
control
registers
ST6391,92,93,95,97,99
50/64
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