參數(shù)資料
型號: ST62P30BB6
英文描述: IC, 60FBGA, 512MBIT DDR DRAM 60 PIN BGA 32MBX16
中文描述: 8位微控制器(MCU)的與檢察官辦公室。光盤。 FASTROM。的A / D轉(zhuǎn)換器。 16位自動重加載定時(shí)器。 EEPROM中。的SPI。 UART和28個(gè)引腳
文件頁數(shù): 41/84頁
文件大?。?/td> 918K
代理商: ST62P30BB6
41/84
ST62T53C/T60C/T63C ST62E60C
I/O PORTS
(Cont’d)
4.1.3 AR Timer Alternate function Option
When bit PWMOE of register ARMC is low, pin AR-
TIMout/PB7 is configured as any standard pin of
port B through the port registers. When PWMOE is
high, ARTIMout/PB7 is the PWM output, independ-
ently of the port registers configuration.
ARTIMin/PB6 is connected to the AR Timer input.
It is configured through the port registers as any
standard pin of port B. To use ARTIMin/PB6 as AR
Timer input, it must be configured as input through
DDRB.
4.1.4 SPI Alternate function Option
PC2/PC4 are used as standard I/O as long as bit
SPCLK of the SPI Mode Register is kept low.
When PC2/Sin is configured as input, it is automat-
ically connected to the SPI shift register input, in-
dependent of the state at SPCLK.
PC3/SOUT is configured as SPI push-pull output
by setting bit 0 of the Miscellaneous register (ad-
dress DDh), regardless of the state of Port C reg-
isters. PC4/SCK is configured as push-pull output
clock (master mode) by programming it as push-
pull output through DDRC register and by setting
bit SPCLK of the SPI Mode Register.
PC4/SCK is configured as input clock (slave mode)
by programming it as input through DDRC register
and by clearing bit SPCLK of the SPI Mode Regis-
ter. With this configuration, PC4 can simultaneous-
ly be used as an input.
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