參數(shù)資料
型號(hào)： ST62P30BB6
英文描述： IC, 60FBGA, 512MBIT DDR DRAM 60 PIN BGA 32MBX16
中文描述： 8位微控制器（MCU）的與檢察官辦公室。光盤。 FASTROM。的A / D轉(zhuǎn)換器。 16位自動(dòng)重加載定時(shí)器。 EEPROM中。的SPI。 UART和28個(gè)引腳
文件頁數(shù)： 25/84頁
文件大小： 918K
代理商： ST62P30BB6
25/84
ST62T53C/T60C/T63C ST62E60C
RESETS
(Cont’d)
3.2.6 MCU Initialization Sequence
When a reset occurs the stack is reset, the PC is
loaded with the address of the Reset Vector (locat-
ed in program ROM starting at address 0FFEh). A
jump to the beginning of the user program must be
coded at this address. Following a Reset, the In-
terrupt flag is automatically set, so that the CPU is
in Non Maskable Interrupt mode; this prevents the
initialisation routine from being interrupted. The in-
itialisation routine should therefore be terminated
by a RETI instruction, in order to revert to normal
mode and enable interrupts. If no pending interrupt
is present at the end of the initialisation routine, the
MCU will continue by processing the instruction
immediately following the RETI instruction. If, how-
ever, a pending interrupt is present, it will be serv-
iced.
Figure 16. Reset and Interrupt Processing
Figure 17. Reset Block Diagram
RESET
RESET
VECTOR
JP
JP:2 BYTES/4 CYCLES
RETI
RETI: 1 BYTE/2 CYCLES
INITIALIZATION
ROUTINE
VA00181
V
DD
RESET
R
PU
R
ESD1)
POWER
WATCHDOG RESET
CK
COUNTER
RESET
ST6
INTERNAL
RESET
f
OSC
RESET
ON RESET
LVD RESET
VR02107A
AND. Wired
1) Resistive ESD protection. Value not guaranteed.
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