參數(shù)資料
型號(hào)： ST62E40B
廠商： 意法半導(dǎo)體
元件分類(lèi)： DRAM
英文描述： The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述： 該CAT24FC02是一個(gè)2 KB的EEPROM的國(guó)內(nèi)256個(gè)8位每字舉辦的串行CMOS
文件頁(yè)數(shù)： 46/72頁(yè)
文件大?。?/td> 445K
代理商： ST62E40B
46/72
46
ST62T40B/E40B
4.4 SERIAL PERIPHERAL INTERFACE (SPI)
The on-chip SPI is an optimized serial synchro-
nous interfacethat supports a widerange of indus-
try standard SPI specifications. The on-chip SPI is
controlled by small and simple user software to
perform serial data exchange. The serial shift
clock can be implemented either by software (us-
ing the bit-set and bit-reset instructions), with the
on-chip Timer 1 by externally connecting the SPI
clock pin to the timer pin or by directly applying an
external clock to the Scl line.
The peripheral is composed by an 8-bit Data/shift
Register and a 4-bit binary counter while the Sin
pin is the serial shift input and Sout is the serial
shift output. These two lines can be tied together
to implement two wires protocols (I C-bus, etc).
When data is serialized, the MSB is thefirst bit. Sin
has to be programmed as input. For serial output
operation Sout has to be programmed as open-
drain output.
The SCL,Sin and Sout SPI clock and data signals
are connected to 3 I/O lines on the same external
pins. Withthese 3 lines, theSPI can operate in the
following operating modes: Software SPI, S-BUS,
I C-bus and as a standard serial I/O (clock, data,
enable). An interrupt request can be generated af-
ter eight clock pulses. Figure 25 shows the SPI
block diagram.
The SCL line clocks, on the falling edge, the shift
register and the counter. To allow SPI operation in
slave mode, the SCL pin must be programmed as
input and an external clock must be supplied to
this pin to drive the SPI peripheral.
In master mode, SCL is programmed as output, a
clock signal must be generated by software to set
and reset the port line.
Figure 25. SPI Block Diagram
Set Res
CLK
RESET
4-Bit Counter
(Q4=High after Clock8)
Data Reg
Direction
I/O Port
8-Bit Data
Shift Register
Reset
Load
DOUT
Output
Enable
8-Bit Tristate Data I/O
RESET
I/O Port
I/O Port
CP
CP
DIN
D0............................D7
to Processor Data Bus
Q4
Q4
OPR Reg.
DIN
SCL
Sin
Sout
SPI Interrupt Disable Register
SPI Data Register
Data Reg
Direction
Data Reg
Direction
DOUT
Write
Read
M0
1
Interrupt
VR01504
相關(guān)PDF資料
PDF描述
ST62T40B The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
ST62T10 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER
ST62T28C 8-BIT MCUs WITH A/D CONVERTER, AUTO-RELOAD TIMER, UART, OSG, SAFE RESET AND 28-PIN PACKAGE
ST6228CN1 ER 3C 3#16S SKT RECP WALL
ST6228CN3 CB 5C 5#16S PIN RECP WALL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST62E40BG1 功能描述:8位微控制器 -MCU UV EPROM 8K SPI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST62E40C 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:GANG PROGRAMMERS FOR ST62 MCU FAMILY
ST62E40G1 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:8-Bit Microcontroller
ST62E42 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:GANG PROGRAMMERS FOR ST62 MCU FAMILY
ST62E42B 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:8-BIT OTP/EPROM MCU WITH LCD DRIVER, EEPROM AND A/D CONVERTER
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*