參數(shù)資料
型號(hào)： ST624XB-KIT
英文描述： STARTER KIT DATASHEET FOR ST624X
中文描述： 入門套件小冊(cè)子的ST624X
文件頁(yè)數(shù)： 19/74頁(yè)
文件大?。?/td> 733K
代理商： ST624XB-KIT
19/74
ST62T46B/E46B
CLOCK SYSTEM
(Cont’d)
3.1.2 32 KHz STAND-BY OSCILLATOR
An additional 32KHz stand-by on chip oscillator al-
lows to generate real time interrupts and to supply
the clock to the LCD driver with the main oscillator
stopped. This enables the MCU to perform real
time functions with the LCD display running while
keeping advantages of low power consumption.
Figure 10
shows the 32KHz oscillator block dia-
gram.
A 32.768KHz quartz crystal must be connected to
the OSC32in and OSC32out pins to perform the
real time clock operation. Two external capacitors
of 15-22pF each must be connected between the
oscillator pins and ground. The 32KHz oscillator is
managed by the dedicated status/control register
32OCR.
As long as the 32KHz stand-by oscillator is ena-
bled, 32KHz internal clock is available to drive
LCD controller driver. This clock is divide by 2
14
to
generate interrupt request every 500ms . The peri-
odic interrupt request serves as reference time-
base for real time functions.
Note
: When the 32KHz stand-by oscillator is
stopped (bit 5 of the Status/Control register
cleared) the divider chain is supplied with a clock
signal synchronous with machine cycle (f
INT
/13),
this produces an interrupt request every 13x2
14
clock cycle (i.e. 26.624ms) with an 8MHz quartz
crystal.
32KHz Oscillator Register (32OCR)
Address: DBh - Read/Write
Bit 7 =
EOSCI
.
Enable Oscillator Interrupt
. This bit,
when set, enables the 32KHz oscillator interrupt
request.
Bit 6 =
OSCEOC
.
Oscillator Interrupt Flag
. This bit
indicates when the 32KHz oscillator has measured
a
500ms
elapsed
32.768KHzquartz crystal is connected to the
32KHz oscillator dedicated pins). An interrupt re-
quest can be generated in relation to the state of
EOSCI bit. This bit must be cleared by the user
program before leaving the interrupt service rou-
tine.
Bit 5 =
START/STOP
. O
scillator Start/Stop bit
.
This bit, when set, enables the 32KHz stand-by
oscillator and the free running divider chain is sup-
plied by the 32KHz oscillator signal. When this bit
is cleared to zero the divider chain is supplied with
f
INT
/13.
This register is cleared during reset.
Note
:
To achieve minimum power consumption in STOP
mode (no system clock), the stand-by oscillator
must be switched off (real time function not availa-
ble) by clearing the Start/Stop bit in the oscillator
status/control register.
time
(providing
a
Figure 10. 32KHz Oscillator Block Diagram
7
0
EOSCI OSCEOC
S/S
D4
D3
D2
D1
D0
OSC32KHz
EOSCI
OSCEOC
START
STOP
X
X
X
X
X
INT
OSC32IN
OSC32OUT
2x15...22pF
32.768KHz
Crystal
f
INT
/13
OSC32KHz
MUX
1
0
DIV 2
14
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參數(shù)描述
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