參數(shù)資料
型號: ST16C550CP40
廠商: Exar Corporation
文件頁數(shù): 29/35頁
文件大?。?/td> 0K
描述: IC UART FIFO 16BYTE 40PDIP
產(chǎn)品變化通告: Leaded UART, V&I Obsolescence 11/Apr/2011
標(biāo)準(zhǔn)包裝: 9
通道數(shù): 1,UART
FIFO's: 16 字節(jié)
電源電壓: 2.97 V ~ 5.5 V
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 通孔
封裝/外殼: 40-DIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 40-PDIP
包裝: 管件
其它名稱: 1016-1422
ST16C550
35
Rev. 5.01
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to
improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits
described herein, conveys no license under any patent or other right, and makes no representation that the circuits
are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may
vary depending upon a user's specific application. While the information in this publication has been carefully
checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure
of the product can reasonably be expected to cause failure of the life support system or to significantly affect its
safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives,
in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user
assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.
Copyright 2005 EXAR Corporation
Datasheet April 2005
Send your UART technical inquiry with technical details to hotline: uarttechsupport@exar.com
Reproduction, in part or whole, without prior written consent of EXAR Corporation is prohibited.
EXPLANATION OF DATA SHEET REVISIONS:
FROM
TO
CHANGES
DATE
4.20
4.30
Added revision history. Added Device Status to front page.
Sept 2003
4.30
5.00
Updated AC Timing values for IOW, CS and IOR pulse widths and
Read/Write cycle delays. This applies to devices with top mark date
Feb 2005
code of "B2 YYWW" and newer.
5.00
5.01
Corrected the AC Timing values. Added Chip Select Width for
Apr 2005
clarification.
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