參數(shù)資料
型號： ST1317EFB-FREQ2
廠商： PERICOM SEMICONDUCTOR CORP
元件分類： XO, clock
英文描述： VCXO, CLOCK, 80.001 MHz - 125 MHz, HCMOS OUTPUT
文件頁數(shù)： 2/2頁
文件大?。?/td> 3923K
代理商： ST1317EFB-FREQ2
DS-170 REV C
SaRonix
ST1317 / ST1517 Series
SaRonix
Voltage Controlled Crystal Oscillator
Technical Data
3.3 & 5V HCMOS, SMD
www.pericom.com/saronix
Tri-State Logic Table
Required Input Levels on Pin 2:
Logic 1 = 3.0V min
Logic 0 = 0.5V max(5V), 0.3V max (3.3V)
Pin 4 Output
Oscillation
High Impedance
Package Details
Recommended Land Pattern
Part Numbering Guide
POWER
SUPPLY
mA
M
V C
0.1μF
OSCILLATOR
Pin 1
Pin 2
Pin 3
Pin 4
Pin 5
Pin 6
C
L
= 50pF: 32 to 50 MHz
30pF: 50+ to 125 MHz
(Note A)
TRI-STATE INPUT or ENABLE/DISABLE
(current limited on fixture)
5V HCMOS (Used at SaRonix)
NOTE A: C
L
includes probe and jig capacitance.
Model
SaRonix Tri-State
Frequency (MHz)
Linearity
B = 10%
Series
1517 = 5V, Ceramic, HCMOS / TTL VCXO
1317 = 3.3V, Ceramic, HCMOS VCXO
Pullability (minimum APR)
*
B = ±100 ppm
N = ±80 ppm
A = ±50 ppm
F = ±32 ppm
ST 1317 B B B - 125.0000 (T)
Stability Tolerance
B = ±50 ppm 0 to +70°C
E = ±50 ppm -40 to +85°C
Test Circuits:
TEST POINT
780
C
L
= 15pF
(Note A)
OSCILLATOR
Pin 1
Pin 2
Pin 3
Pin 4
Pin 5
Pin 6
V C
0.1μF
POWER
SUPPLY
mA
M
V
CC
SIMULATED TEST LOAD
TEST POINT
TRI-STATE INPUT or ENABLE/DISABLE
(current limited on fixture)
Pin 2 Input
Logic 1 or N/C
Logic 0
7.2
.284
5.2
.205
2.0
.079
1.4
.055
2.8
.110
1.6
.063
1.2
.047
5.08
.200
2.54
.100
max
max
max
Pin Functions:
Pin 1: Control Voltage
Pin 2: Tri-State Control
Pin 3: GND
Pin 4: Output
Pin 5: N/C
Pin 6: Supply Voltage
Pin 1
Pin 3
Pin 6
Pin 4
2.54
.100
1.8
.071
4.4
.173
2.0
.079
2.4
.094
5.08
.200
4
3
1
6
**
Scale: None (Dimensions in inches
**
External high frequency power supply decoupling required.
Pin 2
Pin 5
All specifications are subject to change without notice.
Packaging
blank = bulk packaged
(T) = Tape & Reel*
*full reel increments only (500pcs)
5V TTL (Used at SaRonix)
NOTE A: C
L
includes probe and jig capacitance.
Marking Format
(exact location of items may vary)
ST1317 xxx
YYWWX
Frequency
Year
Model
Denotes Pin 1
Configuration
Week
Country of origin
* APR = (VCXO Pull relative to specified Output Frequency) - (VCXO Frequency Stability)
Total VCXO Pull from specified nominal output frequency under all operating conditions for the life of the unit
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