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參數(shù)資料
| 型號(hào)： | SSTUB32S869BHLF |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 2/17頁 |
| 文件大小： | 0K |
| 描述： | IC REGIST BUFF 14BIT DDR2 150BGA |
| 產(chǎn)品變化通告： | Product Discontinuation 09/Dec/2011 |
| 標(biāo)準(zhǔn)包裝： | 240 |
| 類型： | 緩沖器 |
| Tx/Rx類型： | LVCMOS |
| 延遲時(shí)間： | 3.0ns |
| 電容 - 輸入： | 3.5pF |
| 電源電壓： | 1.7 V ~ 1.9 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 150-TFBGA |
| 供應(yīng)商設(shè)備封裝： | 150-CABGA（8x13） |
| 包裝： | 托盤 |
10
ICSSSTUB32S869B
Advance Information
1203—04/11/06
Absolute Maximum Ratings
Storage Temperature . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 2.5V
Input Voltage
1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
-0.5 to VDD + 2.5V
Output Voltage
1,2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
-0.5 to VDDQ + 0.5
Input Clamp Current . . . . . . . . . . . . . . . . . . . . ±50 mA
Output Clamp Current . . . . . . . . . . . . . . . . . . . ±50mA
Continuous Output Current . . . . . . . . . . . . . . . ±50mA
VDDQ or GND Current/Pin . . . . . . . . . . . . . . . ±100mA
Package Thermal Impedance
3
. . . . . . . . . . . . . . .
36°C
Stresses above those listed under
Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Notes:
1. The input and output negative voltage
ratings may be excluded if the input
and output clamp ratings are observed.
2. This current will flow only when the
output is in the high state level
V0 >VDDQ.
3. The package thermal impedance is
calculated
in
accordance
with
JESD 51.
Recommended Operating Conditions
PARAMETER
MIN
TYP
MAX
UNITS
VDD
1.7
1.8
1.9
VREF
0.49 x VDD
0.5 x VDD
0.51 x VDD
VTT
VREF - 0.04
VREF
VREF + 0.04
VI
Input Voltage
0
VDDQ
VIH (DC)
DC Input High Voltage
VREF + 0.125
VIH (AC)
AC Input High Voltage
VREF + 0.250
VIL (DC)
DC Input Low Voltage
VREF - 0.125
VIL (DC)
AC Input Low Voltage
VREF - 0.250
VIH
Input High Voltage Level
0.65 x VDDQ
VIL
Input Low Voltage Level
0.35 x VDDQ
VICR
Common mode Input Range
0.675
1.125
VID
Differential Input Voltage
0.600
IOH
-16
IOL
16
TA
070
°C
1Guaranteed by design, not 100% tested in production.
DESCRIPTION
I/O Supply Voltage
Reference Voltage
Operating Free-Air Temperature
RESET#,
C0
CLK, CLK#
Low-Level Output Current
Termination Voltage
High-Level Output Current
Data Inputs
mA
Note: Reset# and Cn inputs must be helf at valid logic levels (not floating) to ensure proper device operation.
The differential inputs must not be floating unless Reset# is low.
V
C1
Device Mode
0
First Device in Pair, Front
1
Second Device in Pair, Back
Mode Select
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