參數(shù)資料
型號(hào)： SSTL16877DGG
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： 14-bit SSTL_2 registered driver with differential clock inputs
中文描述： SSTL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48
封裝： 6.10 MM, PLASTIC, SOT-362-1, MO-153, TSSOP1-48
文件頁數(shù)： 6/8頁
文件大?。?/td> 75K
代理商： SSTL16877DGG
Philips Semiconductors
14-bit SSTL_2 registered driver with
differential clock inputs
Product specification
SSTL16877
2000 Apr 20
6
PARAMETER MEASUREMENT INFORMATION
AC WAVEFORMS
V
OL
t
PLH
t
PHL
OUTPUT
V
REF
V
REF
V
REF
V
IH
V
IL
CLK
V
OH
V
REF
SW00338
Waveform 1. Propagation delay times inverting and
non-inverting outputs
V
REF
V
REF
V
IH
V
IL
OUTPUT
t
PHL
SW00402
V
OH
V
OL
RESET
Waveform 2. Propagation delay RESET to output.
V
REF
V
REF
V
IH
V
IL
INPUT
SW00339
t
W
Waveform 3. Pulse duration
V
REF
V
IH
V
IL
TIMING INPUT
SW00340
V
REF
V
REF
V
IL
DATA INPUT
t
h
t
su
V
IH
Waveform 4. Setup and hold times
TEST CIRCUIT
V
TT
TEST
POINT
25
C
L
= 10pF or 30pF
25
= SSTL_2 Class II
50
= SSTL_2 Class I
NOTES:
C
includes probe and jig capacitance
All input pulses are supplied by generators having the following characteristics:
PRR
≤
10MHz, Z
= 50
, t
≤
1.25ns/V, t
1.25ns/V.
The outputs are measured one at a time with one transition per measurement.
V
TT
= V
REF
= V
DDQ
x 0.5
SW00337
Figure 1. Load circuitry
50pF
500
SW00336
Figure 2.
SW00335
50pF
Figure 3.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SSTL16877DGG,112 制造商:NXP Semiconductors 功能描述:
SSTL16877DGG,118 制造商:NXP Semiconductors 功能描述:
SSTL16877DGG,512 功能描述:寄存器 20-BIT REG DRVR RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
SSTL16877DGG,518 功能描述:寄存器 20-BIT REG DRVR RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
SSTL16877DGG/G,118 制造商:NXP Semiconductors 功能描述:
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