參數(shù)資料
型號(hào)： SSTL16857DGG
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： Linear Voltage Regulator IC; Output Current Max:150mA; Supply Voltage Max:6V; Package/Case:5-SOT-23; Output Current:150mA; Output Voltage:5V; Current Rating:0.15A; Leaded Process Compatible:No; Output Voltage Max:5V
中文描述： SSTL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48
封裝： PLASTIC, TSSOP-48
文件頁數(shù)： 5/8頁
文件大?。?/td> 76K
代理商： SSTL16857DGG
Philips Semiconductors
14-bit SSTL_2 registered driver with
differential clock inputs
Product specification
SSTL16857
1999 Sep 30
5
TIMING REQUIREMENTS
Over recommended operating conditions; T
amb
= 0 C to +70 C (unless otherwise noted) (see Figure 1)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
V
CC
= 2.5V
±
0.2V
MIN
V
CC
= 3.3V
±
0.3V
MIN
UNIT
MAX
MAX
f
clock
t
w
Clock frequency
200
200
MHz
Pulse duration, CLK, CLK HIGH or LOW
1.0
1.0
ns
t
su
Setup time
Data before CLK
↑
, CLK
↓
0.8
0.9
ns
RESET HIGH before CLK
↑
, CLK
↓
0.8
1.0
t
h
Hold time
0.5
0.5
ns
SWITCHING CHARACTERISTICS
Over recommended operating conditions; T
amb
= 0 C to +70 C; V
DDQ
= 2.3 – 2.7V and V
DDQ
does not exceed V
CC.
Class I, V
REF
= V
TT
= V
DDQ
x 0.5 and C
L
= 10pF (unless otherwise noted) (see Figure 1)
LIMITS
LIMITS
SYMBOL
FROM
(INPUT)
TO
(OUTPUT)
V
CC
= 2.5V
±
0.2V
MIN
V
CC
= 3.3V
±
0.3V
MIN
UNIT
MAX
MAX
f
max
Maximum clock frequency
200
200
MHz
t
PLH
/t
PHL
t
PHL
CLK and CLK
Q
1.0
3.1
0.7
2.6
ns
RESET
Q
2.0
5.0
1.4
4.0
ns
184/200-pin DDR SDRAM DIMM
S
S
S
S
S
S
S
S
S
The PLL clock distribution device and SSTL registered drivers reduce
signal loads on the memory controller and prevent timing delays and
waveform distortions that would cause unreliable operation
SW00393
CBT3857 (9)
CBT
CBT
CBT
CBT
CBT
CBT
CBT
CBT
CBT
S
S
S
S
S
S
S
S
S
SSTL16857
PCK857
SSTL16857
BACK SIDE
FRONT SIDE
相關(guān)PDF資料
PDF描述
SSTL16877 14-bit SSTL_2 registered driver with differential clock inputs
SSTL16877DGG 14-bit SSTL_2 registered driver with differential clock inputs
SSTPAD10 Linear Voltage Regulator IC; Output Current Max:250mA; Supply Voltage Max:6V; Package/Case:8-MSOP; Output Current:250mA; Output Voltage:5V; Current Rating:0.25A; Leaded Process Compatible:No; Output Voltage Max:5V
SSTPAD100 Voltage Regulator IC; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No
SSTPAD20 Low Leakage Pico Amp Diodes
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SSTL16857DGG,112 功能描述:寄存器 14-BIT SSTL 2 REG DRIVER RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
SSTL16857DGG,118 功能描述:寄存器 14-BIT SSTL 2 REG DRIVER RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
SSTL16877 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:14-bit SSTL_2 registered driver with differential clock inputs
SSTL16877DG 功能描述:寄存器 20-BIT REG DRVR W/INV REG RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
SSTL16877DGG 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:14-bit SSTL_2 registered driver with differential clock inputs
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