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參數(shù)資料
| 型號： | SST89E52RC-33-C-PIE |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MS-011AC, DIP-40 |
| 文件頁數(shù)： | 30/57頁 |
| 文件大?。?/td> | 652K |
| 代理商： | SST89E52RC-33-C-PIE |
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36
Data Sheet
FlashFlex MCU
SST89E52RC / SST89E54RC
2007 Silicon Storage Technology, Inc.
S71259-04-000
1/07
7.0 WATCHDOG TIMER
The programmable Watchdog Timer (WDT) is for fail safe
protection against software deadlock and for automatic
recovery.
The Watchdog timer can be utilized as a watchdog or a
timer. To use the Watchdog timer as a watchdog, WDRE
(WDTC[3]) should be set to “1.” To use the Watchdog timer
as a timer only, WDRE should be set to “0” so that an inter-
rupt will be generated upon timer overflow, and the EWD
(IEA[6]) should be set to “1” in order to enable the interrupt.
7.1 Watchdog Timer Mode
To protect the system against software deadlock, WDT
(WDTC[1]) should be refreshed within a user-defined time
period. Without a periodic refresh, an internal hardware
reset will be initiated when WDRE (WDTC[3]) = 1). The
WDRE bit can only be cleared by a power-on reset.
Any Write to WDTC must be preceded by a correct feed
sequence. If WDTON (WDTC[6])=0, SWDT (WDTC[0])
controls the start or stop of the watchdog. If WDTON = 1,
the watchdog starts regardless of SWDT and cannot be
stopped.
The upper 8 bits of the time base register (WDTD) is used
as the reload register of the counter. When WDT
(WDTC[1]) is set to “1,” the content of WDTD is loaded into
the watchdog counter and the prescaler is also cleared.
If a watchdog reset occurs, the internal reset is active for at
least one watchdog clock cycle. The code execution will
begin immediately after the reset cycle.
The WDTS flag bit is set by Watchdog timer overflow and
can only be cleared by power-on reset. Users can also
clear the WDTS bit by writing “1” to it following a correct
feed sequence.
7.2 Pure Timer Mode
In Timer mode, the WDTC and WDTD can be written at
any time without a feed sequence. Setting or clearing the
SWDT bit will start or stop the counter. A timer overflow will
set the WDTS bit. Writing “1” to this bit clears the bit. When
an overflow occurs, the content of WDTD is reloaded into
the counter and the Watchdog timer immediately begins to
count again. If the interrupt is enabled, an interrupt will
occur when the timer overflows. The vector address is
053H and it has a second level priority by default. A feed
sequence is not required in this mode.
7.3 Clock Source
The WDT in the device uses the system clock (XTAL1) as
its time base. So strictly speaking, it is a watchdog counter
rather than a Watchdog timer. The WDT register will incre-
ment every 344,064 crystal clocks. The upper 8-bits of the
time base register (WDTD) are used as the reload register
of the WDT.
Figure 7-1 provides a block diagram of the WDT. Two SFRs
(WDTC and WDTD) control Watchdog timer operation.
The time-out period of the WDT is calculated as follows:
Period = (255 - WDTD) * 344064 * 1/fCLK (XTAL1)
where WDTD is the value loaded into the WDTD register
and fOSC is the oscillator frequency.
7.4 Feed Sequence
In Watchdog mode (WDRE=1), a feed sequence is needed
to write into the WDTC register.
The correct feed sequence is:
1. write FDH to SFIS1,
2. write 2AH to SFIS0, then
3. write to the WDTC register
An incorrect feed sequence will cause an immediate reset
in Watchdog mode.
In Timer mode, the WDTC and WDTD can be written at
any time. A feed sequence is not required.
7.5 Power Saving Considerations for
Using the Watchdog Timer
During Idle mode, the Watchdog timer will remain active.
The device should be awakened and the Watchdog timer
refreshed periodically before expiration. During Power-
down mode, the Watchdog timer is stopped. When the
Watchdog timer is used as a pure timer, users can turn off
the clock to save power. See “Power Management Control
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SST89E52RD2 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:8 bit 8051-Compatibale Microcontroller (MCU) with Embedded SuperFlash Memory |
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| SST89E52RD2_06 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E52RD2-33-C-NI | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E52RD2-33-C-NIE1 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
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