參數(shù)資料
型號(hào): SST89C58-33-I-TQJE
廠商: SILICON STORAGE TECHNOLOGY INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP44
封裝: LEAD FREE, TQFP-44
文件頁數(shù): 17/52頁
文件大小: 967K
代理商: SST89C58-33-I-TQJE
24
Data Sheet
FlashFlex51 MCU
SST89C54 / SST89C58
2004 Silicon Storage Technology, Inc.
S71131-04-000
6/04
4.2.3 In-Application Programming Mode
Commands
All of the following commands can only be initiated in the
IAP mode. In all situations, writing the control byte to the
(SFCM) register will initiate all of the operations. All com-
mands (except Chip-Erase) will not be enabled if the secu-
rity features are enabled on the selected memory block.
The two Program commands are for programming new
data into the memory array. The portion of the memory
array to be programmed should be in the erased state,
FFH. If the memory is not erased, then erase it with an
appropriate Erase command. Do not write (Program or
Erase) to a block that the code is currently fetching
from. This will cause unpredictable program behavior
and may corrupt program data.
The Chip-Erase command erases all bytes in both memory
blocks (16/32KB and 4KB). This command ignores the
Security Lock status and will erase the security lock bits
and RE-MAP bits. The Chip-Erase command sequence is
as follows:
The Block-Erase command erases all bytes in one of the two
memory blocks (16/32KB or 4KB). The selection of the
memory block to be erased is determined by the (SFAH[7])
of the SuperFlash Address Register. The primary flash
memory Block 0 is selected (16/32KB) as follows: for
SST89C58, SFAH[7] = 0 selects Block 0; for SST89C54,
SFAH[7:6] = 00 selects Block 0. For both, SFAH[7:4] = 1111b
selects the secondary flash memory Block 1 (4KB). The
Block-Erase command sequence is as follows:
The Sector-Erase command erases all of the bytes in a
sector. The sector size for the primary flash memory
Block 0 is 128 Bytes. The sector size for the secondary
flash memory Block 1 is 64 Bytes. The selection of the
sector to be erased is determined by the contents of
SFAH, SFAL. Please refer to Figure 3-1 for an illustration
of memory sector organization. The Sector-Erase com-
mand sequence is as follows:
Set-Up
MOV SFDT, #55H
Interrupt scheme
MOV SFCM, #81H
Polling scheme
MOV SFCM, #01H
INT1 interrupt
indicates completion
SFST[2] indicates
operation completion
IAP Enable
ORL SFCF, #40H
1131 F08.0
Set-Up
MOV SFDT, #55H
IAP Enable
ORL SFCF, #40H
OR
Interrupt scheme
MOV SFCM, #8DH
Polling scheme
MOV SFCM, #0DH
Erase 4 KBlock
MOV SFAH, #F0H
Erase 32 KBlock
MOV SFAH, #00H
INT1 interrupt
indicates completion
SFST[2] indicates
operation completion
1131 F09.0
Load sector address
MOV SFAH, #sector_addressH
MOV SFAL, #sector_addressL
Interrupt scheme
MOV SFCM, #8BH
Polling scheme
MOV SFCM, #0BH
INT1 interrupt
indicates completion
SFST[2] indicates
operation completion
1131 F10.0
IAP Enable
ORL SFCF, #40H
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